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Searched refs:CLK_TOP_MUX_VDEC (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6797-clk.h18 #define CLK_TOP_MUX_VDEC 8 macro
/linux/drivers/clk/mediatek/
A Dclk-mt6797.c335 MUX_GATE(CLK_TOP_MUX_VDEC, "vdec_sel", vdec_parents, 0x0050, 8, 3, 15),
/linux/arch/arm64/boot/dts/mediatek/
A Dmt6797.dtsi215 <&topckgen CLK_TOP_MUX_VDEC>;

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