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Searched refs:CLK_TOP_MUX_VENC (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6797-clk.h19 #define CLK_TOP_MUX_VENC 9 macro
/linux/drivers/clk/mediatek/
A Dclk-mt6797.c336 MUX_GATE(CLK_TOP_MUX_VENC, "venc_sel", venc_parents, 0x0050, 16, 2, 23),

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