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Searched refs:CLK_TOP_PMICSPI_SEL (Results 1 – 15 of 15) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8135-clk.h96 #define CLK_TOP_PMICSPI_SEL 85 macro
A Dmt7629-clk.h101 #define CLK_TOP_PMICSPI_SEL 91 macro
A Dmt8516-clk.h166 #define CLK_TOP_PMICSPI_SEL 134 macro
A Dmt7622-clk.h86 #define CLK_TOP_PMICSPI_SEL 74 macro
A Dmt8173-clk.h112 #define CLK_TOP_PMICSPI_SEL 102 macro
A Dmt2712-clk.h149 #define CLK_TOP_PMICSPI_SEL 118 macro
A Dmt2701-clk.h106 #define CLK_TOP_PMICSPI_SEL 95 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8135.c385 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0164, 0, 3, 7),
A Dclk-mt7629.c527 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
A Dclk-mt7622.c559 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
A Dclk-mt8516.c373 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
A Dclk-mt2701.c524 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
A Dclk-mt8167.c545 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
A Dclk-mt8173.c567 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0090, 0, 3, 7 /* 7:5 */),
A Dclk-mt2712.c781 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel",

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