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Searched refs:CLK_TOP_PWM (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt8516-clk.h86 #define CLK_TOP_PWM 54 macro
A Dmt6779-clk.h130 #define CLK_TOP_PWM 120 macro
A Dmt8195-clk.h78 #define CLK_TOP_PWM 66 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8516.c591 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
A Dclk-mt8195-topckgen.c1017 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "top_pwm",
A Dclk-mt8167.c828 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
A Dclk-mt6779.c773 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "pwm_sel", pwm_parents,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8516.dtsi471 clocks = <&topckgen CLK_TOP_PWM>,

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