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Searched refs:CLK_TOP_SPI0_SEL (Results 1 – 10 of 10) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/linux/drivers/clk/mediatek/
A Dclk-mt7629.c507 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
A Dclk-mt7622.c537 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
A Dclk-mt2701.c508 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents,
/linux/arch/arm/boot/dts/
A Dmt7629.dtsi283 <&topckgen CLK_TOP_SPI0_SEL>,
A Dmt2701.dtsi344 <&topckgen CLK_TOP_SPI0_SEL>,
A Dmt7623.dtsi489 <&topckgen CLK_TOP_SPI0_SEL>,
/linux/arch/arm64/boot/dts/mediatek/
A Dmt7622.dtsi492 <&topckgen CLK_TOP_SPI0_SEL>,

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