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Searched refs:CLK_TOP_SPINFI_IFR_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/spi/
A Dmediatek,spi-mtk-nor.yaml76 clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h124 #define CLK_TOP_SPINFI_IFR_SEL 114 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8173.c586 MUX_GATE(CLK_TOP_SPINFI_IFR_SEL, "spinfi_ifr_sel", spinfi_ifr_parents, 0x00c0, 0, 3, 7),
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi785 <&topckgen CLK_TOP_SPINFI_IFR_SEL>;

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