Searched refs:CLK_TOP_SYSPLL1_D2 (Results 1 – 15 of 15) sorted by relevance
| /linux/arch/arm/boot/dts/ |
| A D | mt7629.dtsi | 269 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>;
323 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>,
392 <&topckgen CLK_TOP_SYSPLL1_D2>,
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| /linux/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 35 #define CLK_TOP_SYSPLL1_D2 25 macro
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| A D | mt7622-clk.h | 31 #define CLK_TOP_SYSPLL1_D2 19 macro
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| A D | mt6797-clk.h | 47 #define CLK_TOP_SYSPLL1_D2 37 macro
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| A D | mt6765-clk.h | 37 #define CLK_TOP_SYSPLL1_D2 2 macro
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| A D | mt8173-clk.h | 54 #define CLK_TOP_SYSPLL1_D2 44 macro
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| A D | mt2712-clk.h | 37 #define CLK_TOP_SYSPLL1_D2 6 macro
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| A D | mt2701-clk.h | 16 #define CLK_TOP_SYSPLL1_D2 6 macro
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| /linux/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 403 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
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| A D | clk-mt6797.c | 28 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
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| A D | clk-mt7622.c | 397 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "mainpll", 1, 4),
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| A D | clk-mt2701.c | 63 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
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| A D | clk-mt8173.c | 87 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "main_h546m", 1, 2),
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| A D | clk-mt2712.c | 58 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1,
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| A D | clk-mt6765.c | 84 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
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Completed in 27 milliseconds