Searched refs:CLK_TOP_SYSPLL_D2_D4 (Results 1 – 5 of 5) sorted by relevance

/linux/sound/soc/mediatek/mt8183/
A D	mt8183-afe-clk.c	28 CLK_TOP_SYSPLL_D2_D4, enumerator 68 [CLK_TOP_SYSPLL_D2_D4] = "top_syspll_d2_d4", 151 afe_priv->clk[CLK_TOP_SYSPLL_D2_D4]); in mt8183_afe_enable_clock() 155 aud_clks[CLK_TOP_SYSPLL_D2_D4], ret); in mt8183_afe_enable_clock()
/linux/Documentation/devicetree/bindings/sound/
A D	mt8183-afe-pcm.txt	34 <&topckgen CLK_TOP_SYSPLL_D2_D4>,
/linux/include/dt-bindings/clock/
A D	mt8183-clk.h	84 #define CLK_TOP_SYSPLL_D2_D4 48 macro
/linux/drivers/clk/mediatek/
A D	clk-mt8183.c	44 FACTOR(CLK_TOP_SYSPLL_D2_D4, "syspll_d2_d4", "syspll_d2", 1,
/linux/arch/arm64/boot/dts/mediatek/
A D	mt8183.dtsi	1148 <&topckgen CLK_TOP_SYSPLL_D2_D4>,

Completed in 10 milliseconds

Last Index update Sat Jun 03 09:59:21 CST 2023