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Searched refs:CLK_TOP_VDEC_SEL (Results 1 – 13 of 13) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
A Dmediatek-vcodec.txt65 <&topckgen CLK_TOP_VDEC_SEL>,
80 <&topckgen CLK_TOP_VDEC_SEL>,
/linux/include/dt-bindings/clock/
A Dmt8135-clk.h93 #define CLK_TOP_VDEC_SEL 82 macro
A Dmt8173-clk.h97 #define CLK_TOP_VDEC_SEL 87 macro
A Dmt2712-clk.h134 #define CLK_TOP_VDEC_SEL 103 macro
A Dmt2701-clk.h93 #define CLK_TOP_VDEC_SEL 82 macro
A Dmt8192-clk.h64 #define CLK_TOP_VDEC_SEL 52 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8135.c380 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x015c, 8, 4, 15),
A Dclk-mt2701.c499 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents,
A Dclk-mt8173.c548 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x0050, 8, 4, 15),
A Dclk-mt8192.c828 MUX_GATE_CLR_SET_UPD(CLK_TOP_VDEC_SEL, "vdec_sel",
A Dclk-mt2712.c747 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel",
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi1405 <&topckgen CLK_TOP_VDEC_SEL>,
1420 <&topckgen CLK_TOP_VDEC_SEL>,
A Dmt2712e.dtsi290 <&topckgen CLK_TOP_VDEC_SEL>;

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