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Searched refs:CLK_TOP_VENC_LT_SEL (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
A Dmediatek-vcodec.txt68 <&topckgen CLK_TOP_VENC_LT_SEL>,
78 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
127 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
129 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
/linux/include/dt-bindings/clock/
A Dmt8173-clk.h115 #define CLK_TOP_VENC_LT_SEL 105 macro
/linux/Documentation/devicetree/bindings/soc/mediatek/
A Dscpsys.txt69 <&topckgen CLK_TOP_VENC_LT_SEL>;
/linux/arch/arm64/boot/dts/mediatek/
A Dmt8173.dtsi495 <&topckgen CLK_TOP_VENC_LT_SEL>;
1408 <&topckgen CLK_TOP_VENC_LT_SEL>,
1418 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
1523 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
1525 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
/linux/Documentation/devicetree/bindings/power/
A Dmediatek,power-controller.yaml269 <&topckgen CLK_TOP_VENC_LT_SEL>;
/linux/drivers/clk/mediatek/
A Dclk-mt8173.c570 MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090, 24, 4, 31),

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