Searched refs:CLK_UART0_INTERNAL_DIV (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A D	pistachio-clk.h	66 #define CLK_UART0_INTERNAL_DIV 76 macro
/linux/drivers/clk/pistachio/
A D	clk-pistachio.c	74 DIV_F(CLK_UART0_INTERNAL_DIV, "uart0_internal_div", "sys_pll_mux",
/linux/arch/mips/boot/dts/img/
A D	pistachio.dtsi	259 assigned-clocks = <&clk_core CLK_UART0_INTERNAL_DIV>,

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