Searched refs:CPG_DIV6_DIV (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/renesas/
A D	clk-div6.c	23 #define CPG_DIV6_DIV(d) ((d) & 0x3f) macro 52 | CPG_DIV6_DIV(clock->div - 1); in cpg_div6_clock_enable() 160 writel(val | CPG_DIV6_DIV(clock->div - 1), clock->reg); in cpg_div6_clock_set_rate()

Completed in 3 milliseconds

Last Index update Sat Jun 03 09:59:21 CST 2023