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Searched refs:CSR0_CLRALL (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/net/ethernet/amd/
A Dni65.h36 #define CSR0_CLRALL 0x7f00 /* mask for all clearable bits */ macro
A Dni65.c273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ in ni65_set_performance()
574 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); in ni65_init_lance()
858 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT); in ni65_lance_reinit()
886 writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */ in ni65_interrupt()
888 writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */ in ni65_interrupt()

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