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Searched refs:CSR_SA110_CNTL (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/mtd/maps/
A Ddc21285.c152 switch (*CSR_SA110_CNTL & (3<<14)) { in init_dc21285()
208 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16)); in init_dc21285()
210 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20)); in init_dc21285()
212 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24)); in init_dc21285()
/linux/arch/arm/mach-footbridge/
A Ddc21285.c187 cntl = *CSR_SA110_CNTL & 0xffffdf07; in dc21285_serr_irq()
188 *CSR_SA110_CNTL = cntl | SA110_CNTL_RXSERR; in dc21285_serr_irq()
203 *CSR_SA110_CNTL &= 0xffffde07; in dc21285_discard_irq()
312 *CSR_SA110_CNTL = (*CSR_SA110_CNTL & 0xffffde07) | in dc21285_preinit()
A Dcommon.c212 *CSR_SA110_CNTL &= ~(1 << 13); in footbridge_restart()
218 *CSR_SA110_CNTL |= (1 << 13); in footbridge_restart()
/linux/drivers/watchdog/
A Dwdt285.c71 if (*CSR_SA110_CNTL & (1 << 13)) in watchdog_open()
95 *CSR_SA110_CNTL |= 1 << 13; in watchdog_open()
/linux/arch/arm/include/asm/hardware/
A Ddec21285.h56 #define CSR_SA110_CNTL DC21285_IO(0x013c) macro
88 #define __footbridge_cfn_mode() (*CSR_SA110_CNTL & SA110_CNTL_PCICFN)

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