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Searched refs:CSR_TIMER1_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux/arch/arm/mach-footbridge/
A Ddc21285-timer.c56 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16; in ckevt_dc21285_set_next_event()
63 *CSR_TIMER1_CNTL = 0; in ckevt_dc21285_shutdown()
71 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | in ckevt_dc21285_set_periodic()
97 *CSR_TIMER1_CNTL = 0; in timer1_interrupt()
/linux/arch/arm/include/asm/hardware/
A Ddec21285.h122 #define CSR_TIMER1_CNTL DC21285_IO(0x0308) macro

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