1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  cx18 header containing common defines.
4  *
5  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
6  */
7 
8 #ifndef CX23418_H
9 #define CX23418_H
10 
11 #include <media/drv-intf/cx2341x.h>
12 
13 #define MGR_CMD_MASK				0x40000000
14 /* The MSB of the command code indicates that this is the completion of a
15    command */
16 #define MGR_CMD_MASK_ACK			(MGR_CMD_MASK | 0x80000000)
17 
18 /* Description: This command creates a new instance of a certain task
19    IN[0]  - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
20 	    the processor on which the task YYY will be created
21    OUT[0] - Task handle. This handle is passed along with commands to
22 	    dispatch to the right instance of the task
23    ReturnCode - One of the ERR_SYS_... */
24 #define CX18_CREATE_TASK			(MGR_CMD_MASK | 0x0001)
25 
26 /* Description: This command destroys an instance of a task
27    IN[0] - Task handle. Hanlde of the task to destroy
28    ReturnCode - One of the ERR_SYS_... */
29 #define CX18_DESTROY_TASK			(MGR_CMD_MASK | 0x0002)
30 
31 /* All commands for CPU have the following mask set */
32 #define CPU_CMD_MASK				0x20000000
33 #define CPU_CMD_MASK_DEBUG			(CPU_CMD_MASK | 0x00000000)
34 #define CPU_CMD_MASK_ACK			(CPU_CMD_MASK | 0x80000000)
35 #define CPU_CMD_MASK_CAPTURE			(CPU_CMD_MASK | 0x00020000)
36 #define CPU_CMD_MASK_TS				(CPU_CMD_MASK | 0x00040000)
37 
38 #define EPU_CMD_MASK				0x02000000
39 #define EPU_CMD_MASK_DEBUG			(EPU_CMD_MASK | 0x000000)
40 #define EPU_CMD_MASK_DE				(EPU_CMD_MASK | 0x040000)
41 
42 #define APU_CMD_MASK				0x10000000
43 #define APU_CMD_MASK_ACK			(APU_CMD_MASK | 0x80000000)
44 
45 #define CX18_APU_ENCODING_METHOD_MPEG		(0 << 28)
46 #define CX18_APU_ENCODING_METHOD_AC3		(1 << 28)
47 
48 /* Description: Command APU to start audio
49    IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
50    IN[1] - caller buffer address, or 0
51    ReturnCode - ??? */
52 #define CX18_APU_START				(APU_CMD_MASK | 0x01)
53 
54 /* Description: Command APU to stop audio
55    IN[0] - encoding method to stop
56    ReturnCode - ??? */
57 #define CX18_APU_STOP				(APU_CMD_MASK | 0x02)
58 
59 /* Description: Command APU to reset the AI
60    ReturnCode - ??? */
61 #define CX18_APU_RESETAI			(APU_CMD_MASK | 0x05)
62 
63 /* Description: This command indicates that a Memory Descriptor List has been
64    filled with the requested channel type
65    IN[0] - Task handle. Handle of the task
66    IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
67    IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
68    ReturnCode - One of the ERR_DE_... */
69 #define CX18_EPU_DMA_DONE			(EPU_CMD_MASK_DE | 0x0001)
70 
71 /* Something interesting happened
72    IN[0] - A value to log
73    IN[1] - An offset of a string in the MiniMe memory;
74 	   0/zero/NULL means "I have nothing to say" */
75 #define CX18_EPU_DEBUG				(EPU_CMD_MASK_DEBUG | 0x0003)
76 
77 /* Reads memory/registers (32-bit)
78    IN[0] - Address
79    OUT[1] - Value */
80 #define CX18_CPU_DEBUG_PEEK32			(CPU_CMD_MASK_DEBUG | 0x0003)
81 
82 /* Description: This command starts streaming with the set channel type
83    IN[0] - Task handle. Handle of the task to start
84    ReturnCode - One of the ERR_CAPTURE_... */
85 #define CX18_CPU_CAPTURE_START			(CPU_CMD_MASK_CAPTURE | 0x0002)
86 
87 /* Description: This command stops streaming with the set channel type
88    IN[0] - Task handle. Handle of the task to stop
89    IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
90    ReturnCode - One of the ERR_CAPTURE_... */
91 #define CX18_CPU_CAPTURE_STOP			(CPU_CMD_MASK_CAPTURE | 0x0003)
92 
93 /* Description: This command pauses streaming with the set channel type
94    IN[0] - Task handle. Handle of the task to pause
95    ReturnCode - One of the ERR_CAPTURE_... */
96 #define CX18_CPU_CAPTURE_PAUSE			(CPU_CMD_MASK_CAPTURE | 0x0007)
97 
98 /* Description: This command resumes streaming with the set channel type
99    IN[0] - Task handle. Handle of the task to resume
100    ReturnCode - One of the ERR_CAPTURE_... */
101 #define CX18_CPU_CAPTURE_RESUME			(CPU_CMD_MASK_CAPTURE | 0x0008)
102 
103 #define CAPTURE_CHANNEL_TYPE_NONE		0
104 #define CAPTURE_CHANNEL_TYPE_MPEG		1
105 #define CAPTURE_CHANNEL_TYPE_INDEX		2
106 #define CAPTURE_CHANNEL_TYPE_YUV		3
107 #define CAPTURE_CHANNEL_TYPE_PCM		4
108 #define CAPTURE_CHANNEL_TYPE_VBI		5
109 #define CAPTURE_CHANNEL_TYPE_SLICED_VBI		6
110 #define CAPTURE_CHANNEL_TYPE_TS			7
111 #define CAPTURE_CHANNEL_TYPE_MAX		15
112 
113 /* Description: This command sets the channel type. This can only be done
114    when stopped.
115    IN[0] - Task handle. Handle of the task to start
116    IN[1] - Channel Type. See Below.
117    ReturnCode - One of the ERR_CAPTURE_... */
118 #define CX18_CPU_SET_CHANNEL_TYPE		(CPU_CMD_MASK_CAPTURE + 1)
119 
120 /* Description: Set stream output type
121    IN[0] - task handle. Handle of the task to start
122    IN[1] - type
123    ReturnCode - One of the ERR_CAPTURE_... */
124 #define CX18_CPU_SET_STREAM_OUTPUT_TYPE		(CPU_CMD_MASK_CAPTURE | 0x0012)
125 
126 /* Description: Set video input resolution and frame rate
127    IN[0] - task handle
128    IN[1] - reserved
129    IN[2] - reserved
130    IN[3] - reserved
131    IN[4] - reserved
132    IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
133    ReturnCode - One of the ERR_CAPTURE_... */
134 #define CX18_CPU_SET_VIDEO_IN			(CPU_CMD_MASK_CAPTURE | 0x0004)
135 
136 /* Description: Set video frame rate
137    IN[0] - task handle. Handle of the task to start
138    IN[1] - video bit rate mode
139    IN[2] - video average rate
140    IN[3] - video peak rate
141    IN[4] - system mux rate
142    ReturnCode - One of the ERR_CAPTURE_... */
143 #define CX18_CPU_SET_VIDEO_RATE			(CPU_CMD_MASK_CAPTURE | 0x0005)
144 
145 /* Description: Set video output resolution
146    IN[0] - task handle
147    IN[1] - horizontal size
148    IN[2] - vertical size
149    ReturnCode - One of the ERR_CAPTURE_... */
150 #define CX18_CPU_SET_VIDEO_RESOLUTION		(CPU_CMD_MASK_CAPTURE | 0x0006)
151 
152 /* Description: This command set filter parameters
153    IN[0] - Task handle. Handle of the task
154    IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
155    IN[2] - mode,  temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
156 			median:	0 = disable, 1 = horizontal, 2 = vertical,
157 				3 = horizontal/vertical, 4 = diagonal
158    IN[3] - strength, temporal 0 - 31, spatial 0 - 15
159    ReturnCode - One of the ERR_CAPTURE_... */
160 #define CX18_CPU_SET_FILTER_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0009)
161 
162 /* Description: This command set spatial filter type
163    IN[0] - Task handle.
164    IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
165 		      3 = 2D H/V separable, 4 = 2D symmetric non-separable
166    IN[2] - chroma type: 0 - disable, 1 = 1D horizontal
167    ReturnCode - One of the ERR_CAPTURE_... */
168 #define CX18_CPU_SET_SPATIAL_FILTER_TYPE	(CPU_CMD_MASK_CAPTURE | 0x000C)
169 
170 /* Description: This command set coring levels for median filter
171    IN[0] - Task handle.
172    IN[1] - luma_high
173    IN[2] - luma_low
174    IN[3] - chroma_high
175    IN[4] - chroma_low
176    ReturnCode - One of the ERR_CAPTURE_... */
177 #define CX18_CPU_SET_MEDIAN_CORING		(CPU_CMD_MASK_CAPTURE | 0x000E)
178 
179 /* Description: This command set the picture type mask for index file
180    IN[0] - Task handle (ignored by firmware)
181    IN[1] -	0 = disable index file output
182 			1 = output I picture
183 			2 = P picture
184 			4 = B picture
185 			other = illegal */
186 #define CX18_CPU_SET_INDEXTABLE			(CPU_CMD_MASK_CAPTURE | 0x0010)
187 
188 /* Description: Set audio parameters
189    IN[0] - task handle. Handle of the task to start
190    IN[1] - audio parameter
191    ReturnCode - One of the ERR_CAPTURE_... */
192 #define CX18_CPU_SET_AUDIO_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0011)
193 
194 /* Description: Set video mute
195    IN[0] - task handle. Handle of the task to start
196    IN[1] - bit31-24: muteYvalue
197 	   bit23-16: muteUvalue
198 	   bit15-8:  muteVvalue
199 	   bit0:     1:mute, 0: unmute
200    ReturnCode - One of the ERR_CAPTURE_... */
201 #define CX18_CPU_SET_VIDEO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0013)
202 
203 /* Description: Set audio mute
204    IN[0] - task handle. Handle of the task to start
205    IN[1] - mute/unmute
206    ReturnCode - One of the ERR_CAPTURE_... */
207 #define CX18_CPU_SET_AUDIO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0014)
208 
209 /* Description: Set stream output type
210    IN[0] - task handle. Handle of the task to start
211    IN[1] - subType
212 	    SET_INITIAL_SCR			1
213 	    SET_QUALITY_MODE            2
214 	    SET_VIM_PROTECT_MODE        3
215 	    SET_PTS_CORRECTION          4
216 	    SET_USB_FLUSH_MODE          5
217 	    SET_MERAQPAR_ENABLE         6
218 	    SET_NAV_PACK_INSERTION      7
219 	    SET_SCENE_CHANGE_ENABLE     8
220    IN[2] - parameter 1
221    IN[3] - parameter 2
222    ReturnCode - One of the ERR_CAPTURE_... */
223 #define CX18_CPU_SET_MISC_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0015)
224 
225 /* Description: Set raw VBI parameters
226    IN[0] - Task handle
227    IN[1] - No. of input lines per field:
228 				bit[15:0]: field 1,
229 				bit[31:16]: field 2
230    IN[2] - No. of input bytes per line
231    IN[3] - No. of output frames per transfer
232    IN[4] - start code
233    IN[5] - stop code
234    ReturnCode */
235 #define CX18_CPU_SET_RAW_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0016)
236 
237 /* Description: Set capture line No.
238    IN[0] - task handle. Handle of the task to start
239    IN[1] - height1
240    IN[2] - height2
241    ReturnCode - One of the ERR_CAPTURE_... */
242 #define CX18_CPU_SET_CAPTURE_LINE_NO		(CPU_CMD_MASK_CAPTURE | 0x0017)
243 
244 /* Description: Set copyright
245    IN[0] - task handle. Handle of the task to start
246    IN[1] - copyright
247    ReturnCode - One of the ERR_CAPTURE_... */
248 #define CX18_CPU_SET_COPYRIGHT			(CPU_CMD_MASK_CAPTURE | 0x0018)
249 
250 /* Description: Set audio PID
251    IN[0] - task handle. Handle of the task to start
252    IN[1] - PID
253    ReturnCode - One of the ERR_CAPTURE_... */
254 #define CX18_CPU_SET_AUDIO_PID			(CPU_CMD_MASK_CAPTURE | 0x0019)
255 
256 /* Description: Set video PID
257    IN[0] - task handle. Handle of the task to start
258    IN[1] - PID
259    ReturnCode - One of the ERR_CAPTURE_... */
260 #define CX18_CPU_SET_VIDEO_PID			(CPU_CMD_MASK_CAPTURE | 0x001A)
261 
262 /* Description: Set Vertical Crop Line
263    IN[0] - task handle. Handle of the task to start
264    IN[1] - Line
265    ReturnCode - One of the ERR_CAPTURE_... */
266 #define CX18_CPU_SET_VER_CROP_LINE		(CPU_CMD_MASK_CAPTURE | 0x001B)
267 
268 /* Description: Set COP structure
269    IN[0] - task handle. Handle of the task to start
270    IN[1] - M
271    IN[2] - N
272    ReturnCode - One of the ERR_CAPTURE_... */
273 #define CX18_CPU_SET_GOP_STRUCTURE		(CPU_CMD_MASK_CAPTURE | 0x001C)
274 
275 /* Description: Set Scene Change Detection
276    IN[0] - task handle. Handle of the task to start
277    IN[1] - scene change
278    ReturnCode - One of the ERR_CAPTURE_... */
279 #define CX18_CPU_SET_SCENE_CHANGE_DETECTION	(CPU_CMD_MASK_CAPTURE | 0x001D)
280 
281 /* Description: Set Aspect Ratio
282    IN[0] - task handle. Handle of the task to start
283    IN[1] - AspectRatio
284    ReturnCode - One of the ERR_CAPTURE_... */
285 #define CX18_CPU_SET_ASPECT_RATIO		(CPU_CMD_MASK_CAPTURE | 0x001E)
286 
287 /* Description: Set Skip Input Frame
288    IN[0] - task handle. Handle of the task to start
289    IN[1] - skip input frames
290    ReturnCode - One of the ERR_CAPTURE_... */
291 #define CX18_CPU_SET_SKIP_INPUT_FRAME		(CPU_CMD_MASK_CAPTURE | 0x001F)
292 
293 /* Description: Set sliced VBI parameters -
294    Note This API will only apply to MPEG and Sliced VBI Channels
295    IN[0] - Task handle
296    IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
297    IN[2] - start / stop line
298 			bit[15:0] start line number
299 			bit[31:16] stop line number
300    IN[3] - number of output frames per interrupt
301    IN[4] - VBI insertion mode
302 			bit 0:	output user data, 1 - enable
303 			bit 1:	output private stream, 1 - enable
304 			bit 2:	mux option, 0 - in GOP, 1 - in picture
305 			bit[7:0]	private stream ID
306    IN[5] - insertion period while mux option is in picture
307    ReturnCode - VBI data offset */
308 #define CX18_CPU_SET_SLICED_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0020)
309 
310 /* Description: Set the user data place holder
311    IN[0] - type of data (0 for user)
312    IN[1] - Stuffing period
313    IN[2] - ID data size in word (less than 10)
314    IN[3] - Pointer to ID buffer */
315 #define CX18_CPU_SET_USERDATA_PLACE_HOLDER	(CPU_CMD_MASK_CAPTURE | 0x0021)
316 
317 
318 /* Description:
319    In[0] Task Handle
320    return parameter:
321    Out[0]  Reserved
322    Out[1]  Video PTS bit[32:2] of last output video frame.
323    Out[2]  Video PTS bit[ 1:0] of last output video frame.
324    Out[3]  Hardware Video PTS counter bit[31:0],
325 	     these bits get incremented on every 90kHz clock tick.
326    Out[4]  Hardware Video PTS counter bit32,
327 	     these bits get incremented on every 90kHz clock tick.
328    ReturnCode */
329 #define CX18_CPU_GET_ENC_PTS			(CPU_CMD_MASK_CAPTURE | 0x0022)
330 
331 /* Description: Set VFC parameters
332    IN[0] - task handle
333    IN[1] - VFC enable flag, 1 - enable, 0 - disable
334 */
335 #define CX18_CPU_SET_VFC_PARAM                  (CPU_CMD_MASK_CAPTURE | 0x0023)
336 
337 /* Below is the list of commands related to the data exchange */
338 #define CPU_CMD_MASK_DE				(CPU_CMD_MASK | 0x040000)
339 
340 /* Description: This command provides the physical base address of the local
341    DDR as viewed by EPU
342    IN[0] - Physical offset where EPU has the local DDR mapped
343    ReturnCode - One of the ERR_DE_... */
344 #define CPU_CMD_DE_SetBase			(CPU_CMD_MASK_DE | 0x0001)
345 
346 /* Description: This command provides the offsets in the device memory where
347    the 2 cx18_mdl_ack blocks reside
348    IN[0] - Task handle. Handle of the task to start
349    IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
350 	   local DDR.
351    IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
352 	   local DDR.
353    ReturnCode - One of the ERR_DE_... */
354 #define CX18_CPU_DE_SET_MDL_ACK			(CPU_CMD_MASK_DE | 0x0002)
355 
356 /* Description: This command provides the offset to a Memory Descriptor List
357    IN[0] - Task handle. Handle of the task to start
358    IN[1] - Offset of the MDL from the beginning of the local DDR.
359    IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1]
360    IN[3] - Buffer ID
361    IN[4] - Total buffer length
362    ReturnCode - One of the ERR_DE_... */
363 #define CX18_CPU_DE_SET_MDL			(CPU_CMD_MASK_DE | 0x0005)
364 
365 /* Description: This command requests return of all current Memory
366    Descriptor Lists to the driver
367    IN[0] - Task handle. Handle of the task to start
368    ReturnCode - One of the ERR_DE_... */
369 #define CX18_CPU_DE_RELEASE_MDL			(CPU_CMD_MASK_DE | 0x0006)
370 
371 /* Description: This command signals the cpu that the dat buffer has been
372    consumed and ready for re-use.
373    IN[0] - Task handle. Handle of the task
374    IN[1] - Offset of the data block from the beginning of the local DDR.
375    IN[2] - Number of bytes in the data block
376    ReturnCode - One of the ERR_DE_... */
377 /* #define CX18_CPU_DE_RELEASE_BUFFER           (CPU_CMD_MASK_DE | 0x0007) */
378 
379 /* No Error / Success */
380 #define CNXT_OK                 0x000000
381 
382 /* Received unknown command */
383 #define CXERR_UNK_CMD           0x000001
384 
385 /* First parameter in the command is invalid */
386 #define CXERR_INVALID_PARAM1    0x000002
387 
388 /* Second parameter in the command is invalid */
389 #define CXERR_INVALID_PARAM2    0x000003
390 
391 /* Device interface is not open/found */
392 #define CXERR_DEV_NOT_FOUND     0x000004
393 
394 /* Requested function is not implemented/available */
395 #define CXERR_NOTSUPPORTED      0x000005
396 
397 /* Invalid pointer is provided */
398 #define CXERR_BADPTR            0x000006
399 
400 /* Unable to allocate memory */
401 #define CXERR_NOMEM             0x000007
402 
403 /* Object/Link not found */
404 #define CXERR_LINK              0x000008
405 
406 /* Device busy, command cannot be executed */
407 #define CXERR_BUSY              0x000009
408 
409 /* File/device/handle is not open. */
410 #define CXERR_NOT_OPEN          0x00000A
411 
412 /* Value is out of range */
413 #define CXERR_OUTOFRANGE        0x00000B
414 
415 /* Buffer overflow */
416 #define CXERR_OVERFLOW          0x00000C
417 
418 /* Version mismatch */
419 #define CXERR_BADVER            0x00000D
420 
421 /* Operation timed out */
422 #define CXERR_TIMEOUT           0x00000E
423 
424 /* Operation aborted */
425 #define CXERR_ABORT             0x00000F
426 
427 /* Specified I2C device not found for read/write */
428 #define CXERR_I2CDEV_NOTFOUND   0x000010
429 
430 /* Error in I2C data xfer (but I2C device is present) */
431 #define CXERR_I2CDEV_XFERERR    0x000011
432 
433 /* Channel changing component not ready */
434 #define CXERR_CHANNELNOTREADY   0x000012
435 
436 /* PPU (Presensation/Decoder) mail box is corrupted */
437 #define CXERR_PPU_MB_CORRUPT    0x000013
438 
439 /* CPU (Capture/Encoder) mail box is corrupted */
440 #define CXERR_CPU_MB_CORRUPT    0x000014
441 
442 /* APU (Audio) mail box is corrupted */
443 #define CXERR_APU_MB_CORRUPT    0x000015
444 
445 /* Unable to open file for reading */
446 #define CXERR_FILE_OPEN_READ    0x000016
447 
448 /* Unable to open file for writing */
449 #define CXERR_FILE_OPEN_WRITE   0x000017
450 
451 /* Unable to find the I2C section specified */
452 #define CXERR_I2C_BADSECTION    0x000018
453 
454 /* Error in I2C data xfer (but I2C device is present) */
455 #define CXERR_I2CDEV_DATALOW    0x000019
456 
457 /* Error in I2C data xfer (but I2C device is present) */
458 #define CXERR_I2CDEV_CLOCKLOW   0x00001A
459 
460 /* No Interrupt received from HW (for I2C access) */
461 #define CXERR_NO_HW_I2C_INTR    0x00001B
462 
463 /* RPU is not ready to accept commands! */
464 #define CXERR_RPU_NOT_READY     0x00001C
465 
466 /* RPU is not ready to accept commands! */
467 #define CXERR_RPU_NO_ACK        0x00001D
468 
469 /* The are no buffers ready. Try again soon! */
470 #define CXERR_NODATA_AGAIN      0x00001E
471 
472 /* The stream is stopping. Function not allowed now! */
473 #define CXERR_STOPPING_STATUS   0x00001F
474 
475 /* Trying to access hardware when the power is turned OFF */
476 #define CXERR_DEVPOWER_OFF      0x000020
477 
478 #endif /* CX23418_H */
479