Searched refs:Counter (Results 1 – 25 of 63) sorted by relevance
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19 typedef u_long Counter ; typedef29 Counter count ;195 Counter fddiMACFrame_Ct ;196 Counter fddiMACCopied_Ct ;197 Counter fddiMACTransmit_Ct ;198 Counter fddiMACToken_Ct ;199 Counter fddiMACError_Ct ;200 Counter fddiMACLost_Ct ;203 Counter fddiMACRingOp_Ct ;212 Counter fddiMACOld_Lost_Ct ;[all …]
4 Generic Counter Interface353 registered to the Counter core component for use by the Counter385 | Counter sysfs | | Counter chrdev |388 | standard Counter | | standard Counter |425 | Counter sysfs | | Counter chrdev |428 | standard Counter | | standard Counter |460 Counter core465 Counter sysfs474 Counter chrdev501 Counter events[all …]
3 # Counter devices7 tristate "Counter support"9 This enables counter device support through the Generic Counter84 tristate "Microchip Timer Counter Capture driver"88 Select this option to enable the Microchip Timer Counter Block
12 The Counter Enable signal CNT_EN is used54 | Prescaler +-> | Counter | +-> | Master | TRGO(2)127 Counter is always ON.
240 Size of the Counter events queue in number of struct249 the Counter. This should match the name of the device as it257 belonging to the Counter.264 belonging to the Counter.
1 OMAP Counter-32K bindings
4 Ingenic JZ47xx SoCs Timer/Counter Unit hardware7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
7 title: Atmel Timer Counter Block13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
1 * Cirrus Logic CLPS711X Timer Counter
7 title: Cadence TTC - Triple Timer Counter
7 title: NXP System Counter Module(sys_ctr)
7 title: Ingenic SoCs Timer/Counter Unit (TCU) devicetree bindings
51 /* 64-bit Global Free Running Counter */
26 load_mem_type_cnt = collections.Counter()
30 - Counter value for the rpmb device will be read to stdout.
14 CR 0 (Recovery Counter) used for ptrace81 R (Recovery Counter trap) 0
34 [Fixed Counter: Counts the number of instructions retired. Unit: cpu_atom]36 [Number of instructions retired. Fixed Counter - architectural event. Unit: cpu_core]
83 Support the clocks of the Timer/Counter Unit (TCU) of the Ingenic
28 : CC_INT_CALIB : : Coulomb Counter Internal Calibration29 : CCEOC : : Coulomb Counter End of Conversion
27 # I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
29 14 counter Counter
57 Counter on/off registers.
168 Bit 3 = Counter 2169 Bit 2 = Counter 1170 Bit 1 = Counter 0175 Bit 3 = Counter 2176 Bit 2 = Counter 1177 Bit 1 = Counter 0
11 is one register for each counter. Counter 0 is special in that it always counts
157 bool "Timer Counter Blocks (TCB) support"
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