Searched refs:D1VGA_CONTROL (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/radeon/ |
| A D | avivod.h | 44 #define D1VGA_CONTROL 0x0330 macro
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_hwseq.h | 226 SR(D1VGA_CONTROL), \
290 SR(D1VGA_CONTROL), \
340 SR(D1VGA_CONTROL), \
444 SR(D1VGA_CONTROL), \
504 SR(D1VGA_CONTROL), \
531 SR(D1VGA_CONTROL), \
643 uint32_t D1VGA_CONTROL; member
804 HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 418 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce120_timing_generator_disable_vga()
419 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce120_timing_generator_disable_vga()
421 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce120_timing_generator_disable_vga()
422 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce120_timing_generator_disable_vga()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator.c | 1829 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce110_timing_generator_disable_vga()
1830 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce110_timing_generator_disable_vga()
1832 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce110_timing_generator_disable_vga()
1833 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce110_timing_generator_disable_vga()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | gmc_v6_0.c | 806 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size()
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| A D | gmc_v10_0.c | 624 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v10_0_get_vbios_fb_size()
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| A D | gmc_v7_0.c | 976 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v7_0_get_vbios_fb_size()
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| A D | gmc_v9_0.c | 1108 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v9_0_get_vbios_fb_size()
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| A D | gmc_v8_0.c | 1084 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v8_0_get_vbios_fb_size()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.c | 584 REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga1_mode); in dcn10_disable_vga()
593 REG_WRITE(D1VGA_CONTROL, 0); in dcn10_disable_vga()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_resource.c | 863 SR(D1VGA_CONTROL), \
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.c | 256 REG_WRITE(D1VGA_CONTROL, 0); in dcn20_disable_vga()
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