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Searched refs:DCE3_HDMI_OFFSET0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dr600_reg.h198 #define DCE3_HDMI_OFFSET0 (0x7400 - 0x7400) macro
A Dr600.c3645 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3646 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_disable_interrupt_state()
3791 hdmi0 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0) & ~AFMT_AZ_FORMAT_WTRIG_MASK; in r600_irq_set()
3887 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0); in r600_irq_set()
3921 rdev->irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0); in r600_irq_ack()
3999 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0); in r600_irq_ack()
4001 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp); in r600_irq_ack()
A Dradeon_display.c1536 rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0; in radeon_afmt_init()

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