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Searched refs:DCE3_HDMI_OFFSET1 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Dr600_reg.h199 #define DCE3_HDMI_OFFSET1 (0x7800 - 0x7400) macro
A Dr600.c3647 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~HDMI0_AZ_FORMAT_WTRIG_MASK; in r600_disable_interrupt_state()
3648 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp); in r600_disable_interrupt_state()
3792 hdmi1 = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1) & ~AFMT_AZ_FORMAT_WTRIG_MASK; in r600_irq_set()
3888 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1); in r600_irq_set()
3922 rdev->irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1); in r600_irq_ack()
4004 tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1); in r600_irq_ack()
4006 WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp); in r600_irq_ack()
A Dradeon_display.c1541 rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1; in radeon_afmt_init()

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