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Searched refs:DCLK_VOP0 (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/display/rockchip/
A Drockchip-vop.yaml110 <&cru DCLK_VOP0>,
/linux/include/dt-bindings/clock/
A Drk3288-cru.h87 #define DCLK_VOP0 190 macro
A Drk3399-cru.h129 #define DCLK_VOP0 180 macro
A Drk3568-cru.h286 #define DCLK_VOP0 223 macro
/linux/drivers/clk/rockchip/
A Dclk-rk3288.c445 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
A Dclk-rk3399.c282 MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT,
A Dclk-rk3568.c1041 …COMPOSITE(DCLK_VOP0, "dclk_vop0", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REP…
/linux/arch/arm/boot/dts/
A Drk3288.dtsi776 <&cru DCLK_VOP0>,
1022 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
/linux/arch/arm64/boot/dts/rockchip/
A Drk3399.dtsi1739 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;

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