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Searched refs:DEFINE_RES_MEM (Results 1 – 25 of 104) sorted by relevance

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/linux/arch/arm/mach-s3c/
A Ddevs.c148 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
315 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
350 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
379 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
408 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
437 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
466 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
495 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
524 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
790 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
[all …]
A Ddev-audio-s3c64xx.c50 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256),
69 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256),
88 [0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256),
134 [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256),
153 [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256),
184 [0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256),
A Ddev-uart-s3c64xx.c28 [0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256),
33 [0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256),
38 [0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256),
43 [0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256),
A Dbast-ide.c34 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20),
35 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20),
52 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20),
53 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
A Dmach-anubis.c228 [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
229 [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
245 [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
246 [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
271 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
288 [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),
289 [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
/linux/arch/arm/mach-sa1100/
A Dgeneric.c122 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
140 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
152 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
165 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
198 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
216 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
257 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
258 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
259 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
276 DEFINE_RES_MEM(0x90010000, 0x40),
[all …]
A Djornada720.c175 [0] = DEFINE_RES_MEM(EPSONFBSTART, EPSONFBLEN),
176 [1] = DEFINE_RES_MEM(EPSONREGSTART, EPSONREGLEN),
201 [0] = DEFINE_RES_MEM(SA1111REGSTART, SA1111REGLEN),
360 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
A Dpleb.c42 [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
73 [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
74 [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
A Dh3xxx.c80 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
137 [0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4),
203 DEFINE_RES_MEM(0x80010000, SZ_4K),
204 DEFINE_RES_MEM(0x80020000, SZ_4K),
/linux/drivers/mfd/
A Dsun6i-prcm.c23 DEFINE_RES_MEM(0x0, 4)
27 DEFINE_RES_MEM(0xc, 4)
31 DEFINE_RES_MEM(0x28, 4)
35 DEFINE_RES_MEM(0x54, 4)
39 DEFINE_RES_MEM(0xb0, 4)
43 DEFINE_RES_MEM(SUN8I_CODEC_ANALOG_BASE, SUN8I_CODEC_ANALOG_SIZE),
A Dioc3.c159 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uarta),
165 DEFINE_RES_MEM(offsetof(struct ioc3, sregs.uartb),
214 DEFINE_RES_MEM(offsetof(struct ioc3, serio),
243 DEFINE_RES_MEM(offsetof(struct ioc3, eth),
245 DEFINE_RES_MEM(offsetof(struct ioc3, ssram),
251 DEFINE_RES_MEM(offsetof(struct ioc3, mcr),
295 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV0, M48T35_REG_SIZE)
327 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV1, 1),
328 DEFINE_RES_MEM(IOC3_BYTEBUS_DEV2, 1),
360 DEFINE_RES_MEM(offsetof(struct ioc3, gppr[0]),
[all …]
/linux/arch/arm/mach-ep93xx/
A Dcore.c141 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
193 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
232 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
380 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
443 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
522 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
541 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
644 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
704 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
744 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
[all …]
A Dts72xx.c180 DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
181 DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
198 DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
199 DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
364 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
/linux/arch/sh/kernel/cpu/sh4a/
A Dsetup-sh7770.c22 DEFINE_RES_MEM(0xff923000, 0x100),
42 DEFINE_RES_MEM(0xff924000, 0x100),
62 DEFINE_RES_MEM(0xff925000, 0x100),
82 DEFINE_RES_MEM(0xff926000, 0x100),
102 DEFINE_RES_MEM(0xff927000, 0x100),
122 DEFINE_RES_MEM(0xff928000, 0x100),
142 DEFINE_RES_MEM(0xff929000, 0x100),
162 DEFINE_RES_MEM(0xff92a000, 0x100),
221 DEFINE_RES_MEM(0xffd80000, 0x30),
242 DEFINE_RES_MEM(0xffd81000, 0x30),
[all …]
A Dsetup-sh7734.c32 DEFINE_RES_MEM(0xffe40000, 0x100),
53 DEFINE_RES_MEM(0xffe41000, 0x100),
74 DEFINE_RES_MEM(0xffe42000, 0x100),
95 DEFINE_RES_MEM(0xffe43000, 0x100),
116 DEFINE_RES_MEM(0xffe44000, 0x100),
137 DEFINE_RES_MEM(0xffe43000, 0x100),
199 DEFINE_RES_MEM(0xffd80000, 0x30),
220 DEFINE_RES_MEM(0xffd81000, 0x30),
241 DEFINE_RES_MEM(0xffd82000, 0x30),
A Dsetup-sh7723.c30 DEFINE_RES_MEM(0xffe00000, 0x100),
51 DEFINE_RES_MEM(0xffe10000, 0x100),
72 DEFINE_RES_MEM(0xffe20000, 0x100),
92 DEFINE_RES_MEM(0xa4e30000, 0x100),
112 DEFINE_RES_MEM(0xa4e40000, 0x100),
132 DEFINE_RES_MEM(0xa4e50000, 0x100),
235 DEFINE_RES_MEM(0x044a0000, 0x70),
254 DEFINE_RES_MEM(0xffd80000, 0x2c),
275 DEFINE_RES_MEM(0xffd90000, 0x2c),
A Dsetup-sh7786.c35 DEFINE_RES_MEM(0xffea0000, 0x100),
62 DEFINE_RES_MEM(0xffeb0000, 0x100),
67 DEFINE_RES_MEM(0xffeb0000, 0x100),
92 DEFINE_RES_MEM(0xffec0000, 0x100),
113 DEFINE_RES_MEM(0xffed0000, 0x100),
134 DEFINE_RES_MEM(0xffee0000, 0x100),
155 DEFINE_RES_MEM(0xffef0000, 0x100),
174 DEFINE_RES_MEM(0xffd80000, 0x30),
195 DEFINE_RES_MEM(0xffda0000, 0x2c),
216 DEFINE_RES_MEM(0xffdc0000, 0x2c),
[all …]
/linux/arch/sh/kernel/cpu/sh2a/
A Dsetup-sh7201.c184 DEFINE_RES_MEM(0xfffe8000, 0x100),
204 DEFINE_RES_MEM(0xfffe8800, 0x100),
224 DEFINE_RES_MEM(0xfffe9000, 0x100),
244 DEFINE_RES_MEM(0xfffe9800, 0x100),
264 DEFINE_RES_MEM(0xfffea000, 0x100),
284 DEFINE_RES_MEM(0xfffea800, 0x100),
304 DEFINE_RES_MEM(0xfffeb000, 0x100),
324 DEFINE_RES_MEM(0xfffeb800, 0x100),
359 DEFINE_RES_MEM(0xfffe4000, 0x400),
A Dsetup-sh7264.c233 DEFINE_RES_MEM(0xfffe8000, 0x100),
257 DEFINE_RES_MEM(0xfffe8800, 0x100),
281 DEFINE_RES_MEM(0xfffe9000, 0x100),
305 DEFINE_RES_MEM(0xfffe9800, 0x100),
329 DEFINE_RES_MEM(0xfffea000, 0x100),
353 DEFINE_RES_MEM(0xfffea800, 0x100),
377 DEFINE_RES_MEM(0xfffeb000, 0x100),
401 DEFINE_RES_MEM(0xfffeb800, 0x100),
423 DEFINE_RES_MEM(0xfffec000, 0x10),
439 DEFINE_RES_MEM(0xfffe4000, 0x400),
A Dsetup-sh7206.c140 DEFINE_RES_MEM(0xfffe8000, 0x100),
160 DEFINE_RES_MEM(0xfffe8800, 0x100),
180 DEFINE_RES_MEM(0xfffe9000, 0x100),
200 DEFINE_RES_MEM(0xfffe9800, 0x100),
219 DEFINE_RES_MEM(0xfffec000, 0x10),
235 DEFINE_RES_MEM(0xfffe4000, 0x400),
A Dsetup-sh7269.c255 DEFINE_RES_MEM(0xe8007000, 0x100),
279 DEFINE_RES_MEM(0xe8007800, 0x100),
303 DEFINE_RES_MEM(0xe8008000, 0x100),
327 DEFINE_RES_MEM(0xe8008800, 0x100),
351 DEFINE_RES_MEM(0xe8009000, 0x100),
375 DEFINE_RES_MEM(0xe8009800, 0x100),
399 DEFINE_RES_MEM(0xe800a000, 0x100),
423 DEFINE_RES_MEM(0xe800a800, 0x100),
445 DEFINE_RES_MEM(0xfffec000, 0x10),
461 DEFINE_RES_MEM(0xfffe4000, 0x400),
A Dsetup-sh7203.c181 DEFINE_RES_MEM(0xfffe8000, 0x100),
202 DEFINE_RES_MEM(0xfffe8800, 0x100),
223 DEFINE_RES_MEM(0xfffe9000, 0x100),
244 DEFINE_RES_MEM(0xfffe9800, 0x100),
263 DEFINE_RES_MEM(0xfffec000, 0x10),
279 DEFINE_RES_MEM(0xfffe4000, 0x400),
/linux/arch/arm/mach-rpc/
A Driscpc.c103 DEFINE_RES_MEM(0x03400000, 0x00200000),
118 DEFINE_RES_MEM(0x03200000, 0x10000),
168 DEFINE_RES_MEM(0x030107c0, 0x20),
169 DEFINE_RES_MEM(0x03010fd8, 0x04),
/linux/arch/sh/kernel/cpu/sh2/
A Dsetup-sh7619.c67 DEFINE_RES_MEM(0xf8400000, 0x100),
87 DEFINE_RES_MEM(0xf8410000, 0x100),
107 DEFINE_RES_MEM(0xf8420000, 0x100),
154 DEFINE_RES_MEM(0xf84a0070, 0x10),
/linux/arch/sh/kernel/cpu/sh3/
A Dsetup-sh770x.c115 DEFINE_RES_MEM(0xfffffe80, 0x10),
138 DEFINE_RES_MEM(0xa4000150, 0x10),
160 DEFINE_RES_MEM(0xa4000140, 0x10),
180 DEFINE_RES_MEM(0xfffffe90, 0x2c),

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