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Searched refs:DEF_FIXED (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/clk/renesas/
A Dr8a77980-cpg-mssr.c64 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
65 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
66 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
67 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
68 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
78 DEF_FIXED("ztr", R8A77980_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
80 DEF_FIXED("zt", R8A77980_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
81 DEF_FIXED("zx", R8A77980_CLK_ZX, CLK_PLL1_DIV2, 2, 1),
82 DEF_FIXED("s0d1", R8A77980_CLK_S0D1, CLK_S0, 1, 1),
101 DEF_FIXED("cl", R8A77980_CLK_CL, CLK_PLL1_DIV2, 48, 1),
[all …]
A Dr8a77990-cpg-mssr.c63 DEF_FIXED(".pll0", CLK_PLL0, CLK_MAIN, 1, 100),
64 DEF_FIXED(".pll0d4", CLK_PLL0D4, CLK_PLL0, 4, 1),
65 DEF_FIXED(".pll0d6", CLK_PLL0D6, CLK_PLL0, 6, 1),
66 DEF_FIXED(".pll0d8", CLK_PLL0D8, CLK_PLL0, 8, 1),
67 DEF_FIXED(".pll0d20", CLK_PLL0D20, CLK_PLL0, 20, 1),
68 DEF_FIXED(".pll0d24", CLK_PLL0D24, CLK_PLL0, 24, 1),
69 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
70 DEF_FIXED(".pe", CLK_PE, CLK_PLL0D20, 1, 1),
71 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1),
72 DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1),
[all …]
A Dr8a774c0-cpg-mssr.c64 DEF_FIXED(".pll0", CLK_PLL0, CLK_MAIN, 1, 100),
65 DEF_FIXED(".pll0d4", CLK_PLL0D4, CLK_PLL0, 4, 1),
66 DEF_FIXED(".pll0d6", CLK_PLL0D6, CLK_PLL0, 6, 1),
67 DEF_FIXED(".pll0d8", CLK_PLL0D8, CLK_PLL0, 8, 1),
68 DEF_FIXED(".pll0d20", CLK_PLL0D20, CLK_PLL0, 20, 1),
69 DEF_FIXED(".pll0d24", CLK_PLL0D24, CLK_PLL0, 24, 1),
70 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
71 DEF_FIXED(".pe", CLK_PE, CLK_PLL0D20, 1, 1),
72 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1),
73 DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1),
[all …]
A Dr9a07g044-cpg.c78 DEF_FIXED(".osc", R9A07G044_OSCCLK, CLK_EXTAL, 1, 1),
81 DEF_FIXED(".pll2", CLK_PLL2, CLK_EXTAL, 133, 2),
82 DEF_FIXED(".pll3", CLK_PLL3, CLK_EXTAL, 133, 2),
83 DEF_FIXED(".pll3_400", CLK_PLL3_400, CLK_PLL3, 1, 4),
84 DEF_FIXED(".pll3_533", CLK_PLL3_533, CLK_PLL3, 1, 3),
86 DEF_FIXED(".pll5", CLK_PLL5, CLK_EXTAL, 125, 1),
89 DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
91 DEF_FIXED(".pll2_div2", CLK_PLL2_DIV2, CLK_PLL2, 1, 2),
92 DEF_FIXED(".clk_800", CLK_PLL2_800, CLK_PLL2, 1, 2),
110 DEF_FIXED(".pll6_250", CLK_PLL6_250, CLK_PLL6, 1, 2),
[all …]
A Dr8a77995-cpg-mssr.c61 DEF_FIXED(".pll0", CLK_PLL0, CLK_MAIN, 4, 250),
62 DEF_FIXED(".pll0d2", CLK_PLL0D2, CLK_PLL0, 2, 1),
63 DEF_FIXED(".pll0d3", CLK_PLL0D3, CLK_PLL0, 3, 1),
64 DEF_FIXED(".pll0d5", CLK_PLL0D5, CLK_PLL0, 5, 1),
65 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1),
66 DEF_FIXED(".pe", CLK_PE, CLK_PLL0D3, 4, 1),
67 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1),
68 DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1),
69 DEF_FIXED(".s2", CLK_S2, CLK_PLL1, 4, 1),
70 DEF_FIXED(".s3", CLK_S3, CLK_PLL1, 6, 1),
[all …]
A Dr8a7792-cpg-mssr.c50 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
55 DEF_FIXED("z", R8A7792_CLK_Z, CLK_PLL0, 1, 1),
56 DEF_FIXED("zg", R8A7792_CLK_ZG, CLK_PLL1, 5, 1),
57 DEF_FIXED("zx", R8A7792_CLK_ZX, CLK_PLL1, 3, 1),
58 DEF_FIXED("zs", R8A7792_CLK_ZS, CLK_PLL1, 6, 1),
59 DEF_FIXED("hp", R8A7792_CLK_HP, CLK_PLL1, 12, 1),
60 DEF_FIXED("i", R8A7792_CLK_I, CLK_PLL1, 3, 1),
61 DEF_FIXED("b", R8A7792_CLK_B, CLK_PLL1, 12, 1),
62 DEF_FIXED("lb", R8A7792_CLK_LB, CLK_PLL1, 24, 1),
63 DEF_FIXED("p", R8A7792_CLK_P, CLK_PLL1, 24, 1),
[all …]
A Dr8a774b1-cpg-mssr.c62 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
63 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
64 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
65 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
66 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
67 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
68 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
80 DEF_FIXED("ztr", R8A774B1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
81 DEF_FIXED("ztrd2", R8A774B1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
82 DEF_FIXED("zt", R8A774B1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
[all …]
A Dr8a774e1-cpg-mssr.c64 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
65 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
66 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
67 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
68 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
69 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
70 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
83 DEF_FIXED("ztr", R8A774E1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
84 DEF_FIXED("ztrd2", R8A774E1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
85 DEF_FIXED("zt", R8A774E1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
[all …]
A Dr8a7796-cpg-mssr.c69 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
70 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
71 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
72 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
73 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
74 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
75 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
88 DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
89 DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
90 DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
[all …]
A Dr8a77965-cpg-mssr.c67 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
68 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
69 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
70 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
71 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
87 DEF_FIXED("s0d1", R8A77965_CLK_S0D1, CLK_S0, 1, 1),
88 DEF_FIXED("s0d2", R8A77965_CLK_S0D2, CLK_S0, 2, 1),
89 DEF_FIXED("s0d3", R8A77965_CLK_S0D3, CLK_S0, 3, 1),
90 DEF_FIXED("s0d4", R8A77965_CLK_S0D4, CLK_S0, 4, 1),
91 DEF_FIXED("s0d6", R8A77965_CLK_S0D6, CLK_S0, 6, 1),
[all …]
A Dr8a774a1-cpg-mssr.c64 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
65 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
66 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
67 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
68 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
69 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
70 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
83 DEF_FIXED("ztr", R8A774A1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
84 DEF_FIXED("ztrd2", R8A774A1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
85 DEF_FIXED("zt", R8A774A1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
[all …]
A Dr8a7795-cpg-mssr.c67 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
68 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
69 DEF_FIXED(".s0", CLK_S0, CLK_PLL1_DIV2, 2, 1),
70 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 3, 1),
71 DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
72 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
73 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
86 DEF_FIXED("ztr", R8A7795_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
87 DEF_FIXED("ztrd2", R8A7795_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
88 DEF_FIXED("zt", R8A7795_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
[all …]
A Dr8a7794-cpg-mssr.c52 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
61 DEF_FIXED("z2", R8A7794_CLK_Z2, CLK_PLL0, 1, 1),
62 DEF_FIXED("zg", R8A7794_CLK_ZG, CLK_PLL1, 6, 1),
63 DEF_FIXED("zx", R8A7794_CLK_ZX, CLK_PLL1, 3, 1),
64 DEF_FIXED("zs", R8A7794_CLK_ZS, CLK_PLL1, 6, 1),
65 DEF_FIXED("hp", R8A7794_CLK_HP, CLK_PLL1, 12, 1),
66 DEF_FIXED("i", R8A7794_CLK_I, CLK_PLL1, 2, 1),
67 DEF_FIXED("b", R8A7794_CLK_B, CLK_PLL1, 12, 1),
68 DEF_FIXED("lb", R8A7794_CLK_LB, CLK_PLL1, 24, 1),
69 DEF_FIXED("p", R8A7794_CLK_P, CLK_PLL1, 24, 1),
[all …]
A Dr8a7745-cpg-mssr.c48 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
56 DEF_FIXED("z2", R8A7745_CLK_Z2, CLK_PLL0, 1, 1),
57 DEF_FIXED("zg", R8A7745_CLK_ZG, CLK_PLL1, 6, 1),
58 DEF_FIXED("zx", R8A7745_CLK_ZX, CLK_PLL1, 3, 1),
59 DEF_FIXED("zs", R8A7745_CLK_ZS, CLK_PLL1, 6, 1),
60 DEF_FIXED("hp", R8A7745_CLK_HP, CLK_PLL1, 12, 1),
61 DEF_FIXED("b", R8A7745_CLK_B, CLK_PLL1, 12, 1),
62 DEF_FIXED("lb", R8A7745_CLK_LB, CLK_PLL1, 24, 1),
63 DEF_FIXED("p", R8A7745_CLK_P, CLK_PLL1, 24, 1),
64 DEF_FIXED("cl", R8A7745_CLK_CL, CLK_PLL1, 48, 1),
[all …]
A Dr8a77970-cpg-mssr.c75 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
76 DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
79 DEF_FIXED("ztr", R8A77970_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
81 DEF_FIXED("zt", R8A77970_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
82 DEF_FIXED("zx", R8A77970_CLK_ZX, CLK_PLL1_DIV2, 3, 1),
83 DEF_FIXED("s1d1", R8A77970_CLK_S1D1, CLK_PLL1_DIV2, 4, 1),
94 DEF_FIXED("rpc", R8A77970_CLK_RPC, CLK_PLL1_DIV2, 5, 1),
97 DEF_FIXED("cl", R8A77970_CLK_CL, CLK_PLL1_DIV2, 48, 1),
98 DEF_FIXED("cp", R8A77970_CLK_CP, CLK_EXTAL, 2, 1),
99 DEF_FIXED("cpex", R8A77970_CLK_CPEX, CLK_EXTAL, 2, 1),
[all …]
A Dr8a77470-cpg-mssr.c48 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
57 DEF_FIXED("z2", R8A77470_CLK_Z2, CLK_PLL0, 1, 1),
58 DEF_FIXED("zx", R8A77470_CLK_ZX, CLK_PLL1, 3, 1),
59 DEF_FIXED("zs", R8A77470_CLK_ZS, CLK_PLL1, 6, 1),
60 DEF_FIXED("hp", R8A77470_CLK_HP, CLK_PLL1, 12, 1),
61 DEF_FIXED("b", R8A77470_CLK_B, CLK_PLL1, 12, 1),
63 DEF_FIXED("p", R8A77470_CLK_P, CLK_PLL1, 24, 1),
64 DEF_FIXED("cl", R8A77470_CLK_CL, CLK_PLL1, 48, 1),
65 DEF_FIXED("cp", R8A77470_CLK_CP, CLK_PLL1, 48, 1),
66 DEF_FIXED("m2", R8A77470_CLK_M2, CLK_PLL1, 8, 1),
[all …]
A Dr8a779a0-cpg-mssr.c127 DEF_FIXED(".s1", CLK_S1, CLK_PLL1_DIV2, 2, 1),
128 DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 4, 1),
140 DEF_FIXED("s1d1", R8A779A0_CLK_S1D1, CLK_S1, 1, 1),
141 DEF_FIXED("s1d2", R8A779A0_CLK_S1D2, CLK_S1, 2, 1),
142 DEF_FIXED("s1d4", R8A779A0_CLK_S1D4, CLK_S1, 4, 1),
143 DEF_FIXED("s1d8", R8A779A0_CLK_S1D8, CLK_S1, 8, 1),
145 DEF_FIXED("s3d1", R8A779A0_CLK_S3D1, CLK_S3, 1, 1),
146 DEF_FIXED("s3d2", R8A779A0_CLK_S3D2, CLK_S3, 2, 1),
147 DEF_FIXED("s3d4", R8A779A0_CLK_S3D4, CLK_S3, 4, 1),
153 DEF_FIXED("vip", R8A779A0_CLK_VIP, CLK_PLL5, 5, 1),
[all …]
A Dr8a7790-cpg-mssr.c52 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
64 DEF_FIXED("z2", R8A7790_CLK_Z2, CLK_PLL1, 2, 1),
65 DEF_FIXED("zg", R8A7790_CLK_ZG, CLK_PLL1, 3, 1),
66 DEF_FIXED("zx", R8A7790_CLK_ZX, CLK_PLL1, 3, 1),
67 DEF_FIXED("zs", R8A7790_CLK_ZS, CLK_PLL1, 6, 1),
68 DEF_FIXED("hp", R8A7790_CLK_HP, CLK_PLL1, 12, 1),
69 DEF_FIXED("i", R8A7790_CLK_I, CLK_PLL1, 2, 1),
70 DEF_FIXED("b", R8A7790_CLK_B, CLK_PLL1, 12, 1),
71 DEF_FIXED("p", R8A7790_CLK_P, CLK_PLL1, 24, 1),
72 DEF_FIXED("cl", R8A7790_CLK_CL, CLK_PLL1, 48, 1),
[all …]
A Dr8a7791-cpg-mssr.c53 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
63 DEF_FIXED("zg", R8A7791_CLK_ZG, CLK_PLL1, 3, 1),
64 DEF_FIXED("zx", R8A7791_CLK_ZX, CLK_PLL1, 3, 1),
65 DEF_FIXED("zs", R8A7791_CLK_ZS, CLK_PLL1, 6, 1),
66 DEF_FIXED("hp", R8A7791_CLK_HP, CLK_PLL1, 12, 1),
67 DEF_FIXED("i", R8A7791_CLK_I, CLK_PLL1, 2, 1),
68 DEF_FIXED("b", R8A7791_CLK_B, CLK_PLL1, 12, 1),
69 DEF_FIXED("lb", R8A7791_CLK_LB, CLK_PLL1, 24, 1),
70 DEF_FIXED("p", R8A7791_CLK_P, CLK_PLL1, 24, 1),
71 DEF_FIXED("cl", R8A7791_CLK_CL, CLK_PLL1, 48, 1),
[all …]
A Dr8a7743-cpg-mssr.c49 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
58 DEF_FIXED("zg", R8A7743_CLK_ZG, CLK_PLL1, 3, 1),
59 DEF_FIXED("zx", R8A7743_CLK_ZX, CLK_PLL1, 3, 1),
60 DEF_FIXED("zs", R8A7743_CLK_ZS, CLK_PLL1, 6, 1),
61 DEF_FIXED("hp", R8A7743_CLK_HP, CLK_PLL1, 12, 1),
62 DEF_FIXED("b", R8A7743_CLK_B, CLK_PLL1, 12, 1),
63 DEF_FIXED("lb", R8A7743_CLK_LB, CLK_PLL1, 24, 1),
64 DEF_FIXED("p", R8A7743_CLK_P, CLK_PLL1, 24, 1),
65 DEF_FIXED("cl", R8A7743_CLK_CL, CLK_PLL1, 48, 1),
66 DEF_FIXED("m2", R8A7743_CLK_M2, CLK_PLL1, 8, 1),
[all …]
A Dr8a7742-cpg-mssr.c48 DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
59 DEF_FIXED("z2", R8A7742_CLK_Z2, CLK_PLL1, 2, 1),
60 DEF_FIXED("zg", R8A7742_CLK_ZG, CLK_PLL1, 3, 1),
61 DEF_FIXED("zx", R8A7742_CLK_ZX, CLK_PLL1, 3, 1),
62 DEF_FIXED("zs", R8A7742_CLK_ZS, CLK_PLL1, 6, 1),
63 DEF_FIXED("hp", R8A7742_CLK_HP, CLK_PLL1, 12, 1),
64 DEF_FIXED("b", R8A7742_CLK_B, CLK_PLL1, 12, 1),
65 DEF_FIXED("p", R8A7742_CLK_P, CLK_PLL1, 24, 1),
66 DEF_FIXED("cl", R8A7742_CLK_CL, CLK_PLL1, 48, 1),
67 DEF_FIXED("m2", R8A7742_CLK_M2, CLK_PLL1, 8, 1),
[all …]
A Dr7s9210-cpg-mssr.c66 DEF_FIXED("p1c", R7S9210_CLK_P1C, CLK_PLL, 16, 1),
77 DEF_FIXED("i", R7S9210_CLK_I, CLK_PLL, 2, 1),
78 DEF_FIXED("g", R7S9210_CLK_G, CLK_PLL, 4, 1),
79 DEF_FIXED("b", R7S9210_CLK_B, CLK_PLL, 8, 1),
80 DEF_FIXED("p1", R7S9210_CLK_P1, CLK_PLL, 16, 1),
81 DEF_FIXED("p0", R7S9210_CLK_P0, CLK_PLL, 32, 1),
A Drenesas-cpg-mssr.h51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ macro
A Drzg2l-cpg.h93 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ macro

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