Searched refs:DISPCLK_FREQ_CHANGE_CNTL (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dccg.h | 40 SR(DISPCLK_FREQ_CHANGE_CNTL)
73 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_DELAY, mask_sh),\
74 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_STEP_SIZE, mask_sh),\
75 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_FREQ_RAMP_DONE, mask_sh),\
76 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_MAX_ERRDET_CYCLES, mask_sh),\
77 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_RESET, mask_sh),\
78 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_STATE, mask_sh),\
79 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DCCG_FIFO_ERRDET_OVR_EN, mask_sh),\
80 DCCG_SF(DISPCLK_FREQ_CHANGE_CNTL, DISPCLK_CHG_FWD_CORR_DISABLE, mask_sh),\
131 type DISPCLK_FREQ_CHANGE_CNTL;\
[all …]
|
| A D | dcn20_dccg.c | 104 REG_UPDATE(DISPCLK_FREQ_CHANGE_CNTL, in dccg2_set_fifo_errdet_ovr_en()
|
| A D | dcn20_hwseq.c | 250 REG_WRITE(DISPCLK_FREQ_CHANGE_CNTL, 0xe01003c); in dcn20_dccg_init()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_hwseq.h | 243 SR(DISPCLK_FREQ_CHANGE_CNTL), \
307 SR(DISPCLK_FREQ_CHANGE_CNTL), \
354 SR(DISPCLK_FREQ_CHANGE_CNTL), \
378 SR(DISPCLK_FREQ_CHANGE_CNTL), \
411 SR(DISPCLK_FREQ_CHANGE_CNTL), \
463 SR(DISPCLK_FREQ_CHANGE_CNTL), \
520 SR(DISPCLK_FREQ_CHANGE_CNTL), \
632 uint32_t DISPCLK_FREQ_CHANGE_CNTL; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_resource.c | 838 SR(DISPCLK_FREQ_CHANGE_CNTL), \
|
Completed in 18 milliseconds