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Searched refs:DPIO_CH1 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_dpio_phy.c170 [DPIO_CH1] = { .port = PORT_C },
257 port == phy_info->channel[DPIO_CH1].port) { in bxt_port_to_phy_channel()
259 *ch = DPIO_CH1; in bxt_port_to_phy_channel()
817 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
832 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
840 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
965 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
A Dintel_display_power.c1550 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1551 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1552 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1572 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1581 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) && in assert_chv_phy_status()
1583 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1593 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1596 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1775 if (ch == DPIO_CH1 && val == 0) in assert_chv_phy_powergate()
5922 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1); in chv_phy_control_init()
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A Dintel_display_types.h1729 return DPIO_CH1; in vlv_dig_port_to_channel()
1757 return DPIO_CH1; in vlv_pipe_to_channel()
A Dintel_display.h281 DPIO_CH1 enumerator
/linux/drivers/gpu/drm/i915/gvt/
A Dhandlers.c559 ch = DPIO_CH1; in bxt_vgpu_get_dp_bitrate()
3537 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3538 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH1), D_BXT); in init_bxt_mmio_info()
3556 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 0), D_BXT); in init_bxt_mmio_info()
3557 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 1), D_BXT); in init_bxt_mmio_info()
3558 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 2), D_BXT); in init_bxt_mmio_info()
3559 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 3), D_BXT); in init_bxt_mmio_info()
3560 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 6), D_BXT); in init_bxt_mmio_info()
3561 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 8), D_BXT); in init_bxt_mmio_info()
3562 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 9), D_BXT); in init_bxt_mmio_info()
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