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Searched refs:DPLL_FPA01_P1_POST_DIV_SHIFT (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/gma500/
A Dpsb_intel_display.c338 DPLL_FPA01_P1_POST_DIV_SHIFT); in psb_intel_crtc_clock_get()
354 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in psb_intel_crtc_clock_get()
A Dcdv_intel_display.c869 DPLL_FPA01_P1_POST_DIV_SHIFT); in cdv_intel_crtc_clock_get()
889 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in cdv_intel_crtc_clock_get()
A Dpsb_intel_reg.h254 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro
/linux/drivers/gpu/drm/i915/display/
A Dintel_dpll.c836 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll()
842 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_compute_dpll()
896 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll()
901 dpll |= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_compute_dpll()
1044 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in ilk_compute_dpll()
A Dintel_display.c5816 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
5847 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
5858 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in i9xx_crtc_clock_get()
11133 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) | in i830_enable_pipe()
/linux/drivers/gpu/drm/i915/
A Di915_reg.h3566 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro

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