1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2013-2016 Freescale Semiconductor Inc. 3 * Copyright 2019 NXP 4 */ 5 #ifndef _FSL_DPMAC_CMD_H 6 #define _FSL_DPMAC_CMD_H 7 8 /* DPMAC Version */ 9 #define DPMAC_VER_MAJOR 4 10 #define DPMAC_VER_MINOR 4 11 #define DPMAC_CMD_BASE_VERSION 1 12 #define DPMAC_CMD_2ND_VERSION 2 13 #define DPMAC_CMD_ID_OFFSET 4 14 15 #define DPMAC_CMD(id) (((id) << DPMAC_CMD_ID_OFFSET) | DPMAC_CMD_BASE_VERSION) 16 #define DPMAC_CMD_V2(id) (((id) << DPMAC_CMD_ID_OFFSET) | DPMAC_CMD_2ND_VERSION) 17 18 /* Command IDs */ 19 #define DPMAC_CMDID_CLOSE DPMAC_CMD(0x800) 20 #define DPMAC_CMDID_OPEN DPMAC_CMD(0x80c) 21 22 #define DPMAC_CMDID_GET_ATTR DPMAC_CMD(0x004) 23 #define DPMAC_CMDID_SET_LINK_STATE DPMAC_CMD_V2(0x0c3) 24 25 #define DPMAC_CMDID_GET_COUNTER DPMAC_CMD(0x0c4) 26 27 /* Macros for accessing command fields smaller than 1byte */ 28 #define DPMAC_MASK(field) \ 29 GENMASK(DPMAC_##field##_SHIFT + DPMAC_##field##_SIZE - 1, \ 30 DPMAC_##field##_SHIFT) 31 32 #define dpmac_set_field(var, field, val) \ 33 ((var) |= (((val) << DPMAC_##field##_SHIFT) & DPMAC_MASK(field))) 34 #define dpmac_get_field(var, field) \ 35 (((var) & DPMAC_MASK(field)) >> DPMAC_##field##_SHIFT) 36 37 struct dpmac_cmd_open { 38 __le32 dpmac_id; 39 }; 40 41 struct dpmac_rsp_get_attributes { 42 u8 eth_if; 43 u8 link_type; 44 __le16 id; 45 __le32 max_rate; 46 }; 47 48 #define DPMAC_STATE_SIZE 1 49 #define DPMAC_STATE_SHIFT 0 50 #define DPMAC_STATE_VALID_SIZE 1 51 #define DPMAC_STATE_VALID_SHIFT 1 52 53 struct dpmac_cmd_set_link_state { 54 __le64 options; 55 __le32 rate; 56 __le32 pad0; 57 /* from lsb: up:1, state_valid:1 */ 58 u8 state; 59 u8 pad1[7]; 60 __le64 supported; 61 __le64 advertising; 62 }; 63 64 struct dpmac_cmd_get_counter { 65 u8 id; 66 }; 67 68 struct dpmac_rsp_get_counter { 69 __le64 pad; 70 __le64 counter; 71 }; 72 73 #endif /* _FSL_DPMAC_CMD_H */ 74