Searched refs:DP_VID_STREAM_CNTL (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_link_encoder.h | 69 SRI(DP_VID_STREAM_CNTL, DP, id), \
102 SRI(DP_VID_STREAM_CNTL, DP, id), \
179 uint32_t DP_VID_STREAM_CNTL; member
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| A D | dce_stream_encoder.c | 935 REG_GET(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, ®1); in dce110_stream_encoder_dp_blank()
941 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2); in dce110_stream_encoder_dp_blank()
949 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in dce110_stream_encoder_dp_blank()
956 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in dce110_stream_encoder_dp_blank()
1030 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in dce110_stream_encoder_dp_unblank()
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| A D | dce_stream_encoder.h | 91 SRI(DP_VID_STREAM_CNTL, DP, id), \
161 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, mask_sh),\
162 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, mask_sh),\
163 SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, mask_sh),\
665 uint32_t DP_VID_STREAM_CNTL; member
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| A D | dce_link_encoder.c | 461 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
513 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_stream_encoder.c | 499 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, false); in enc2_stream_encoder_dp_unblank()
500 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, 0, 10, 5000); in enc2_stream_encoder_dp_unblank()
531 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc2_stream_encoder_dp_unblank()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_stream_encoder.c | 920 REG_GET(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, ®1); in enc1_stream_encoder_dp_blank()
927 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2); in enc1_stream_encoder_dp_blank()
935 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in enc1_stream_encoder_dp_blank()
944 REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, in enc1_stream_encoder_dp_blank()
1027 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, true); in enc1_stream_encoder_dp_unblank()
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| A D | dcn10_link_encoder.h | 62 SRI(DP_VID_STREAM_CNTL, DP, id), \
104 uint32_t DP_VID_STREAM_CNTL; member
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| A D | dcn10_stream_encoder.h | 92 SRI(DP_VID_STREAM_CNTL, DP, id), \
140 uint32_t DP_VID_STREAM_CNTL; member
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| A D | dcn10_link_encoder.c | 393 REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_dio_link_encoder.h | 51 SRI(DP_VID_STREAM_CNTL, DP, id), \
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| A D | dcn30_dio_stream_encoder.h | 95 SRI(DP_VID_STREAM_CNTL, DP, id), \
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| /linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| A D | dcn301_dio_link_encoder.h | 52 SRI(DP_VID_STREAM_CNTL, DP, id), \
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