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Searched refs:DSC_NUM_BUF_RANGES (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_qp_tables.c28 static const u8 rc_range_minqp444_8bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_8BPC_MAX_NUM_BPP] = {
61 static const u8 rc_range_maxqp444_8bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_8BPC_MAX_NUM_BPP] = {
94 static const u8 rc_range_minqp444_10bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_10BPC_MAX_NUM_BPP] = {
142 static const u8 rc_range_maxqp444_10bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_10BPC_MAX_NUM_BPP] = {
190 static const u8 rc_range_minqp444_12bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_12BPC_MAX_NUM_BPP] = {
238 static const u8 rc_range_maxqp444_12bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_12BPC_MAX_NUM_BPP] = {
A Dintel_vdsc.c48 struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
417 for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) { in calculate_rc_params()
469 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) { in intel_dsc_compute_params()
514 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { in intel_dsc_compute_params()
905 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) { in intel_dsc_pps_configure()
958 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { in intel_dsc_pps_configure()
/linux/include/drm/
A Ddrm_dsc.h14 #define DSC_NUM_BUF_RANGES 15 macro
176 u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
182 struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
502 u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
508 __be16 rc_range_parameters[DSC_NUM_BUF_RANGES];
/linux/drivers/gpu/drm/
A Ddrm_dsc.c234 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) in drm_dsc_pps_payload_pack()
243 for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { in drm_dsc_pps_payload_pack()

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