Searched refs:EMC_CFG (Results 1 – 8 of 8) sorted by relevance
| /linux/arch/arm/mach-tegra/ |
| A D | sleep-tegra30.S | 18 #define EMC_CFG 0xc macro
500 ldr r1, [r0, #EMC_CFG]
502 str r1, [r0, #EMC_CFG]
568 ldr r1, [r5, #0x0] @ restore EMC_CFG
569 str r1, [r0, #EMC_CFG]
590 .word TEGRA_EMC_BASE + EMC_CFG @0x0
601 .word TEGRA_EMC0_BASE + EMC_CFG @0x0
609 .word TEGRA_EMC1_BASE + EMC_CFG @0x20
617 .word TEGRA124_EMC_BASE + EMC_CFG @0x0
829 ldr r1, [r0, #EMC_CFG]
[all …]
|
| A D | sleep-tegra20.S | 23 #define EMC_CFG 0xc macro
236 ldr r1, [r0, #EMC_CFG]
238 str r1, [r0, #EMC_CFG]
|
| /linux/drivers/memory/tegra/ |
| A D | tegra210-emc-cc-r21021.c | 501 emc_cfg_o = emc_readl(emc, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
510 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
565 emc_writel(emc, emc_cfg_o, EMC_CFG); in tegra210_emc_r21021_periodic_compensation()
648 emc_readl(emc, EMC_CFG); in tegra210_emc_r21021_set_clock()
720 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_set_clock()
752 emc_writel(emc, emc_cfg, EMC_CFG); in tegra210_emc_r21021_set_clock()
1025 if (offset == EMC_CFG) { in tegra210_emc_r21021_set_clock()
1612 EMC_CFG, 0); in tegra210_emc_r21021_set_clock()
1708 emc_writel(emc, next->burst_regs[EMC_CFG_INDEX], EMC_CFG); in tegra210_emc_r21021_set_clock()
|
| A D | tegra124-emc.c | 39 #define EMC_CFG 0xc macro
620 val = readl(emc->regs + EMC_CFG); in tegra_emc_prepare_timing_change()
623 writel(val, emc->regs + EMC_CFG); in tegra_emc_prepare_timing_change()
706 emc_ccfifo_writel(emc, val, EMC_CFG); in tegra_emc_prepare_timing_change()
843 writel(timing->emc_cfg, emc->regs + EMC_CFG); in tegra_emc_complete_timing_change()
889 timing->emc_cfg = readl(emc->regs + EMC_CFG); in emc_read_current_timing()
|
| A D | tegra30-emc.c | 39 #define EMC_CFG 0x00c macro
539 emc->emc_cfg = readl_relaxed(emc->regs + EMC_CFG); in emc_prepare_timing_change()
564 writel_relaxed(emc->emc_cfg, emc->regs + EMC_CFG); in emc_prepare_timing_change()
677 emc->regs + EMC_CFG); in emc_prepare_timing_change()
711 writel_relaxed(emc->emc_cfg, emc->regs + EMC_CFG); in emc_prepare_timing_change()
806 writel_relaxed(emc->emc_cfg, emc->regs + EMC_CFG); in emc_complete_timing_change()
|
| A D | tegra210-emc.h | 26 #define EMC_CFG 0xc macro
|
| A D | tegra210-emc-core.c | 245 EMC_CFG,
|
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| A D | nvidia,tegra124-emc.yaml | 103 value of the EMC_CFG register for this set of timings
|
Completed in 27 milliseconds