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Searched refs:EN0 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/pcmcia/
A Dsa1100_simpad.c21 simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); in simpad_pcmcia_hw_init()
66 simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); in simpad_pcmcia_configure_socket()
71 simpad_set_cs3_bit(VCC_5V_EN|EN0); in simpad_pcmcia_configure_socket()
76 simpad_set_cs3_bit(VCC_3V_EN|EN0); in simpad_pcmcia_configure_socket()
82 simpad_clear_cs3_bit(VCC_3V_EN|VCC_5V_EN|EN0|EN1); in simpad_pcmcia_configure_socket()
/linux/arch/mips/loongson64/
A Dsmp.c312 (SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
314 (SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
316 (SMP_CORE_GROUP0_BASE + SMP_CORE2_OFFSET + EN0); in ipi_en0_regs_init()
318 (SMP_CORE_GROUP0_BASE + SMP_CORE3_OFFSET + EN0); in ipi_en0_regs_init()
320 (SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
322 (SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
324 (SMP_CORE_GROUP1_BASE + SMP_CORE2_OFFSET + EN0); in ipi_en0_regs_init()
326 (SMP_CORE_GROUP1_BASE + SMP_CORE3_OFFSET + EN0); in ipi_en0_regs_init()
328 (SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
330 (SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
[all …]
A Dsmp.h22 #define EN0 0x04 macro
/linux/Documentation/devicetree/bindings/mfd/
A Dmax77620.txt40 (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
79 hardware input to PMIC i.e. EN0, EN1 or
85 for hardware input pin EN0.
/linux/arch/arm/mach-sa1100/include/mach/
A Dsimpad.h101 #define EN0 0x0008 /* Both should be enable for 3.3V or 5V */ macro
/linux/arch/arm/mach-sa1100/
A Dsimpad.c206 cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | in simpad_map_io()

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