Searched refs:EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG (Results 1 – 3 of 3) sorted by relevance
55 { EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
80 { EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
399 #define EXYNOS5_OSCCLK_GATE_SYSMEM_SYS_PWR_REG 0x11B4 macro
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