Searched refs:EXYNOS5_SDMMC_MEM_SYS_PWR_REG (Results 1 – 2 of 2) sorted by relevance
59 { EXYNOS5_SDMMC_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
403 #define EXYNOS5_SDMMC_MEM_SYS_PWR_REG 0x11D0 macro
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