Searched refs:EXYNOS_MOUT_AUDSS (Results 1 – 11 of 11) sorted by relevance
54 <&clock_audss EXYNOS_MOUT_AUDSS>,65 <&clock_audss EXYNOS_MOUT_AUDSS>,
59 <&clock_audss EXYNOS_MOUT_AUDSS>,70 <&clock_audss EXYNOS_MOUT_AUDSS>,
135 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,140 <&clock_audss EXYNOS_MOUT_AUDSS>;
131 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,138 <&clock_audss EXYNOS_MOUT_AUDSS>;
108 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,114 <&clock_audss EXYNOS_MOUT_AUDSS>;
159 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
235 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
156 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
13 #define EXYNOS_MOUT_AUDSS 0 macro
107 for (i = EXYNOS_MOUT_AUDSS; i < EXYNOS_DOUT_SRP; i++) { in exynos_audss_clk_teardown()184 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()
Completed in 21 milliseconds