Searched refs:EXYNOS_SCLK_I2S (Results 1 – 10 of 10) sorted by relevance
20 #define EXYNOS_SCLK_I2S 7 macro
66 <&clock_audss EXYNOS_SCLK_I2S>;
71 <&clock_audss EXYNOS_SCLK_I2S>;
223 <&clock_audss EXYNOS_SCLK_I2S>;
520 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
82 <&clock_audss EXYNOS_SCLK_I2S>;
600 <&clock_audss EXYNOS_SCLK_I2S>;
506 <&clock_audss EXYNOS_SCLK_I2S>;
220 clk_table[EXYNOS_SCLK_I2S] = clk_hw_register_gate(dev, "sclk_i2s", in exynos_audss_clk_probe()
148 <&clock_audss EXYNOS_SCLK_I2S>;
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