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Searched refs:FIELD32 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/net/wireless/ralink/rt2x00/
A Drt2800.h158 #define LDO25_LEVEL FIELD32(0x00030000)
161 #define CMB_RSV FIELD32(0x00300000)
162 #define XTAL_RDY FIELD32(0x00400000)
163 #define PLL_LD FIELD32(0x00800000)
165 #define LDO_BGSEL FIELD32(0x30000000)
166 #define LDO3_EN FIELD32(0x40000000)
167 #define LDO0_EN FIELD32(0x80000000)
200 #define OSC_RSV FIELD32(0x0000e000)
233 #define PLL_LPF_R1 FIELD32(0x00080000)
247 #define WLAN_EN FIELD32(0x00000001)
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A Drt2500pci.h88 #define CSR3_BYTE0 FIELD32(0x000000ff)
89 #define CSR3_BYTE1 FIELD32(0x0000ff00)
90 #define CSR3_BYTE2 FIELD32(0x00ff0000)
91 #define CSR3_BYTE3 FIELD32(0xff000000)
97 #define CSR4_BYTE4 FIELD32(0x000000ff)
98 #define CSR4_BYTE5 FIELD32(0x0000ff00)
104 #define CSR5_BYTE0 FIELD32(0x000000ff)
105 #define CSR5_BYTE1 FIELD32(0x0000ff00)
106 #define CSR5_BYTE2 FIELD32(0x00ff0000)
107 #define CSR5_BYTE3 FIELD32(0xff000000)
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A Drt61pci.h74 #define MCU_CNTL_CSR_RESET FIELD32(0x00000002)
299 #define MAC_CSR8_SIFS FIELD32(0x000000ff)
301 #define MAC_CSR8_EIFS FIELD32(0xffff0000)
1130 #define RF3_TXPOWER FIELD32(0x00003e00)
1302 #define TXD_W0_ACK FIELD32(0x00000008)
1305 #define TXD_W0_IFS FIELD32(0x00000040)
1340 #define TXD_W3_IV FIELD32(0xffffffff)
1345 #define TXD_W4_EIV FIELD32(0xffffffff)
1434 #define RXD_W2_IV FIELD32(0xffffffff)
1440 #define RXD_W3_EIV FIELD32(0xffffffff)
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A Drt2400pci.h77 #define CSR3_BYTE0 FIELD32(0x000000ff)
78 #define CSR3_BYTE1 FIELD32(0x0000ff00)
79 #define CSR3_BYTE2 FIELD32(0x00ff0000)
80 #define CSR3_BYTE3 FIELD32(0xff000000)
86 #define CSR4_BYTE4 FIELD32(0x000000ff)
87 #define CSR4_BYTE5 FIELD32(0x0000ff00)
93 #define CSR5_BYTE0 FIELD32(0x000000ff)
94 #define CSR5_BYTE1 FIELD32(0x0000ff00)
95 #define CSR5_BYTE2 FIELD32(0x00ff0000)
96 #define CSR5_BYTE3 FIELD32(0xff000000)
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A Drt73usb.h150 #define MAC_CSR2_BYTE0 FIELD32(0x000000ff)
151 #define MAC_CSR2_BYTE1 FIELD32(0x0000ff00)
209 #define MAC_CSR8_SIFS FIELD32(0x000000ff)
211 #define MAC_CSR8_EIFS FIELD32(0xffff0000)
935 #define TXD_W0_ACK FIELD32(0x00000008)
938 #define TXD_W0_IFS FIELD32(0x00000040)
972 #define TXD_W3_IV FIELD32(0xffffffff)
977 #define TXD_W4_EIV FIELD32(0xffffffff)
1027 #define RXD_W2_IV FIELD32(0xffffffff)
1033 #define RXD_W3_EIV FIELD32(0xffffffff)
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A Drt2800mmio.h49 #define TXD_W1_BURST FIELD32(0x00008000)
65 #define TXD_W3_WIV FIELD32(0x01000000)
66 #define TXD_W3_QSEL FIELD32(0x06000000)
67 #define TXD_W3_TCO FIELD32(0x20000000)
68 #define TXD_W3_UCO FIELD32(0x40000000)
69 #define TXD_W3_ICO FIELD32(0x80000000)
78 #define RXD_W0_SDP0 FIELD32(0xffffffff)
83 #define RXD_W1_SDL1 FIELD32(0x00003fff)
85 #define RXD_W1_LS0 FIELD32(0x40000000)
98 #define RXD_W3_BA FIELD32(0x00000001)
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A Drt2800usb.h47 #define TXINFO_W0_WIV FIELD32(0x01000000)
48 #define TXINFO_W0_QSEL FIELD32(0x06000000)
78 #define RXD_W0_BA FIELD32(0x00000001)
79 #define RXD_W0_DATA FIELD32(0x00000002)
81 #define RXD_W0_FRAG FIELD32(0x00000008)
85 #define RXD_W0_MY_BSS FIELD32(0x00000080)
88 #define RXD_W0_AMSDU FIELD32(0x00000800)
89 #define RXD_W0_HTC FIELD32(0x00001000)
90 #define RXD_W0_RSSI FIELD32(0x00002000)
91 #define RXD_W0_L2PAD FIELD32(0x00004000)
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A Drt2500usb.h620 #define RF1_TUNER FIELD32(0x00020000)
625 #define RF3_TUNER FIELD32(0x00000100)
626 #define RF3_TXPOWER FIELD32(0x00003e00)
761 #define TXD_W0_ACK FIELD32(0x00000200)
763 #define TXD_W0_OFDM FIELD32(0x00000800)
765 #define TXD_W0_IFS FIELD32(0x00006000)
774 #define TXD_W1_AIFS FIELD32(0x000000c0)
789 #define TXD_W3_IV FIELD32(0xffffffff)
794 #define TXD_W4_EIV FIELD32(0xffffffff)
823 #define RXD_W2_IV FIELD32(0xffffffff)
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A Drt2x00reg.h227 #define FIELD32(__mask) \ macro

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