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/linux/drivers/staging/axis-fifo/
A DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
A Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
37 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
45 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
51 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
54 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
/linux/Documentation/devicetree/bindings/interrupt-controller/
A Dcirrus,clps711x-intc.txt24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
29 17: SS2RX SSI2 receive FIFO half or greater full
30 18: SS2TX SSI2 transmit FIFO less than half empty
31 28: UTXINT2 UART2 transmit FIFO half empty
32 29: URXINT2 UART2 receive FIFO half full
/linux/Documentation/devicetree/bindings/net/can/
A Dbosch,m_can.yaml54 and each element(e.g Rx FIFO or Tx Buffer and etc) number
64 are used to specify how many elements are used for each FIFO/Buffer.
69 Rx FIFO 0 0-64 elements / 0-1152 words
70 Rx FIFO 1 0-64 elements / 0-1152 words
72 Tx Event FIFO 0-32 elements / 0-64 words
90 - description: Rx FIFO 0 0-64 elements / 0-1152 words
93 - description: Rx FIFO 1 0-64 elements / 0-1152 words
99 - description: Tx Event FIFO 0-32 elements / 0-64 words
/linux/Documentation/devicetree/bindings/dma/
A Dst,stm32-dma.yaml34 -bit 0-1: DMA FIFO threshold selection
35 0x0: 1/4 full FIFO
36 0x1: 1/2 full FIFO
37 0x2: 3/4 full FIFO
38 0x3: full FIFO
40 0x0: FIFO mode with threshold selectable with bit 0-1
42 from/to the memory, FIFO is bypassed.
A Datmel-dma.txt31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
/linux/drivers/video/fbdev/riva/
A Driva_hw.c1351 LOAD_FIXED_STATE(nv4,FIFO); in UpdateFifoState()
1362 LOAD_FIXED_STATE(nv10,FIFO); in UpdateFifoState()
1645 LOAD_FIXED_STATE(Riva,FIFO); in LoadStateExt()
1841 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); in nv3SetSurfaces2D()
1844 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); in nv3SetSurfaces2D()
1846 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); in nv3SetSurfaces2D()
1848 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000013); in nv3SetSurfaces2D()
1858 (RivaSurface __iomem *)&(chip->FIFO[0x0000E000/4]); in nv4SetSurfaces2D()
1860 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000003); in nv4SetSurfaces2D()
1862 NV_WR32(&chip->FIFO[0x00003800], 0, 0x80000004); in nv4SetSurfaces2D()
[all …]
/linux/Documentation/devicetree/bindings/serial/
A Dmvebu-uart.txt7 (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
8 FIFO), called also UART1.
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
11 accesses to the FIFO), called also UART2.
A D8250.yaml92 - ns16550 # Deprecated, unless the FIFO really is broken
101 - ns16550 # Deprecated, unless the FIFO really is broken
176 Specify the TX FIFO low water indication for parts with programmable
177 TX FIFO thresholds.
/linux/Documentation/spi/
A Dpxa2xx.rst15 The driver is built around a &struct spi_message FIFO serviced by kernel
16 thread. The kernel thread, spi_pump_messages(), drives message FIFO and
109 used to configure the SSP hardware FIFO. These fields are critical to the
111 FIFO overruns (especially in PIO mode transfers). Good default values are::
126 trailing bytes in the SSP receiver FIFO. The correct value for this field is
174 .tx_threshold = 8, /* SSP hardward FIFO threshold */
175 .rx_threshold = 8, /* SSP hardward FIFO threshold */
182 .tx_threshold = 8, /* SSP hardward FIFO threshold */
183 .rx_threshold = 8, /* SSP hardward FIFO threshold */
/linux/Documentation/devicetree/bindings/edac/
A Dsocfpga-eccmgr.txt85 Ethernet FIFO ECC
93 NAND FIFO ECC
101 DMA FIFO ECC
109 USB FIFO ECC
117 QSPI FIFO ECC
125 SDMMC FIFO ECC
268 Ethernet FIFO ECC
275 NAND FIFO ECC
282 DMA FIFO ECC
289 USB FIFO ECC
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
A Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
19 PSC FIFO Controller and b is a field that represents an
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
/linux/drivers/scsi/aic7xxx/
A Daic79xx.seq179 * the FIFO to complete the SCB.
308 * The FIFO use count field is shared with the
874 * Command retry. Free our current FIFO and
875 * re-allocate a FIFO so transfer state is
1234 * SCB is not transferring in the other FIFO.
1484 * any FIFO, it is important that we service a FIFO
1494 * this FIFO.
1499 * Switch to the other FIFO. Non-RTI chips
1512 * FIFO not currently on the bus first.
1543 * request in the other FIFO.
[all …]
/linux/arch/sparc/include/asm/
A Dfloppy_64.h449 #define FIFO (port + 5) macro
468 sun_pci_fd_out_byte(port, 0x08, FIFO); in sun_pci_fd_sensei()
479 result[i++] = inb(FIFO); in sun_pci_fd_sensei()
514 sun_pci_fd_out_byte(port, 0x07, FIFO); in sun_pci_fd_test_drive()
515 sun_pci_fd_out_byte(port, drive & 0x03, FIFO); in sun_pci_fd_test_drive()
530 #undef FIFO
/linux/drivers/edac/
A DKconfig431 bool "Altera Ethernet FIFO ECC"
438 bool "Altera NAND FIFO ECC"
442 Altera NAND FIFO Memory for Altera SoCs.
445 bool "Altera DMA FIFO ECC"
449 Altera DMA FIFO Memory for Altera SoCs.
452 bool "Altera USB FIFO ECC"
456 Altera USB FIFO Memory for Altera SoCs.
459 bool "Altera QSPI FIFO ECC"
463 Altera QSPI FIFO Memory for Altera SoCs.
466 bool "Altera SDMMC FIFO ECC"
[all …]
/linux/drivers/video/fbdev/nvidia/
A Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
/linux/arch/powerpc/platforms/512x/
A DKconfig14 tristate "MPC512x LocalPlus Bus FIFO driver"
17 Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
/linux/drivers/char/tpm/
A DKconfig48 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
53 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
59 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
65 TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
78 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface (MMIO - SynQuacer)"
83 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
/linux/Documentation/devicetree/bindings/memory-controllers/
A Dqca,ath79-ddr-controller.yaml14 flush the FIFO between various devices and the DDR. This is mainly used by
15 the IRQ controller to flush the FIFO before running the interrupt handler of
/linux/Documentation/devicetree/bindings/sound/
A Dsamsung-i2s.yaml19 secondary FIFO, s/w reset control and internal mux for root clock
23 playback, stereo channel capture, secondary FIFO using internal
30 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
/linux/arch/arm/include/debug/
A Dsamsung.S56 @ FIFO enabled...
80 @ FIFO enabled...
/linux/Documentation/devicetree/bindings/spi/
A Dqcom,spi-geni-qcom.txt4 (an output FIFO and an input FIFO) for serial peripheral interface (SPI)
/linux/Documentation/sound/cards/
A Daudigy-mixer.rst84 The result is forwarded to the ADC capture FIFO (thus to the standard capture
97 The result is forwarded to the ADC capture FIFO (thus to the standard capture
105 capture FIFO (device 1 - 16bit/8KHz mono) too without volume control.
110 The result is forwarded to the ADC capture FIFO (thus to the standard capture
123 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
134 digital inputs. The result samples are forwarded to the ADC capture FIFO
147 capture FIFO (thus to the standard capture PCM device).
160 capture FIFO (thus to the standard capture PCM device).
172 capture FIFO (thus to the standard capture PCM device).
A Dsb-live-mixer.rst93 The result is forwarded to the ADC capture FIFO (thus to the standard capture
106 The result is forwarded to the ADC capture FIFO (thus to the standard capture
120 The result is forwarded to the ADC capture FIFO (thus to the standard capture
149 of the AC97 codec. The result is forwarded to the ADC capture FIFO (thus to
166 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
178 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
189 digital inputs. The result samples are forwarded to the ADC capture FIFO
201 digital inputs. The result samples are forwarded to the ADC capture FIFO
214 capture FIFO (thus to the standard capture PCM device).
/linux/Documentation/devicetree/bindings/mailbox/
A Dallwinner,sun6i-a31-msgbox.yaml16 transmitted message has been acknowledged by the remote user. Each FIFO can
17 hold four 32-bit messages; when a FIFO is full, clients must wait before

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