/linux/arch/sh/kernel/cpu/sh2a/ |
A D | setup-sh7203.c | 37 ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1, enumerator 105 INTC_IRQ(FLCTL, 224), INTC_IRQ(FLCTL, 225), 106 INTC_IRQ(FLCTL, 226), INTC_IRQ(FLCTL, 227), 155 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } }, 160 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
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/linux/arch/sh/kernel/cpu/sh4a/ |
A D | setup-sh7780.c | 307 SCIF1, SIOF, HSPI, MMCIF, TMU3, TMU4, TMU5, SSI, FLCTL, GPIO, enumerator 344 INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20), 345 INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60), 357 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, 374 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } },
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A D | setup-sh7785.c | 385 FLCTL, GPIO, enumerator 427 INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20), 428 INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60), 454 FLCTL, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB, 474 { 0xffd40020, 0, 32, 8, /* INT2PRI8 */ { FLCTL, GPIO, SSI0, SSI1, } },
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A D | setup-sh7734.c | 334 FLCTL, enumerator 426 INTC_VECT(FLCTL, 0xDE0), 469 FLCTL, 519 { ADMAC, FLCTL, GPIO0_3, GPIO4_5 } },
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A D | setup-sh7366.c | 271 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, enumerator 310 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 353 { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF, 0, FLCTL, I2C } },
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A D | setup-sh7343.c | 329 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, USB, enumerator 372 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 414 { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } },
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A D | setup-sh7786.c | 494 FLCTL, enumerator 539 INTC_VECT(FLCTL, 0xe40), 610 FLCTL, 0, 649 { 0xfe410854, 0, 32, 8, /* INT2PRI21 */ { HAC0, HAC1, FLCTL, 0 } },
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A D | setup-sh7723.c | 466 DMAC1A, DMAC0A, VIO, DMAC0B, FLCTL, I2C, _2DG, enumerator 565 INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I), 614 { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0,MSIOF_MSIOFI1, FLCTL, I2C } },
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A D | setup-sh7722.c | 544 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, enumerator 587 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 630 { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } },
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/linux/Documentation/devicetree/bindings/mtd/ |
A D | flctl-nand.txt | 1 FLCTL NAND controller 5 - reg : Address range of the FLCTL
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/linux/drivers/mtd/nand/raw/ |
A D | Kconfig | 294 tristate "Renesas SuperH FLCTL NAND controller" 298 Several Renesas SuperH CPU has FLCTL. This option enables support 299 for NAND Flash using FLCTL.
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