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Searched refs:FSL_MC_DDR_SDRAM_CFG (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/edac/
A Dfsl_ddr_edac.h27 #define FSL_MC_DDR_SDRAM_CFG 0x0110 macro
A Dfsl_ddr_edac.c308 bus_width = (ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG) & in fsl_mc_check()
402 sdram_ctl = ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG); in fsl_ddr_init_csrows()
537 sdram_ctl = ddr_in32(pdata->mc_vbase + FSL_MC_DDR_SDRAM_CFG); in fsl_mc_err_probe()

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