Searched refs:GCC_PCIE_0_BCR (Results 1 – 25 of 25) sorted by relevance
/linux/include/dt-bindings/reset/ |
A D | qcom,gcc-apq8084.h | 90 #define GCC_PCIE_0_BCR 81 macro
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/linux/include/dt-bindings/clock/ |
A D | qcom,gcc-sm6350.h | 165 #define GCC_PCIE_0_BCR 6 macro
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A D | qcom,gcc-qcs404.h | 165 #define GCC_PCIE_0_BCR 9 macro
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A D | qcom,gcc-sc7280.h | 209 #define GCC_PCIE_0_BCR 0 macro
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A D | qcom,gcc-sdm845.h | 205 #define GCC_PCIE_0_BCR 1 macro
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A D | qcom,gcc-sm8150.h | 217 #define GCC_PCIE_0_BCR 4 macro
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A D | qcom,gcc-sm8250.h | 216 #define GCC_PCIE_0_BCR 4 macro
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A D | qcom,gcc-sm8350.h | 219 #define GCC_PCIE_0_BCR 4 macro
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A D | qcom,gcc-msm8998.h | 206 #define GCC_PCIE_0_BCR 12 macro
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A D | qcom,gcc-sc8180x.h | 254 #define GCC_PCIE_0_BCR 4 macro
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A D | qcom,gcc-msm8996.h | 319 #define GCC_PCIE_0_BCR 79 macro
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/linux/Documentation/devicetree/bindings/pci/ |
A D | qcom,pcie.txt | 368 resets = <&gcc GCC_PCIE_0_BCR>;
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/linux/arch/arm64/boot/dts/qcom/ |
A D | qcs404.dtsi | 1317 <&gcc GCC_PCIE_0_BCR>,
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A D | sm8250.dtsi | 1421 resets = <&gcc GCC_PCIE_0_BCR>;
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A D | sdm845.dtsi | 2037 resets = <&gcc GCC_PCIE_0_BCR>;
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/linux/drivers/clk/qcom/ |
A D | gcc-qcs404.c | 2794 [GCC_PCIE_0_BCR] = { 0x3e000 },
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A D | gcc-apq8084.c | 3562 [GCC_PCIE_0_BCR] = { 0x1ac0 },
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A D | gcc-msm8996.c | 3578 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-msm8998.c | 3060 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sc7280.c | 3407 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sdm845.c | 3509 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sm8250.c | 3541 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sm8150.c | 3689 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sm8350.c | 3750 [GCC_PCIE_0_BCR] = { 0x6b000 },
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A D | gcc-sc8180x.c | 4494 [GCC_PCIE_0_BCR] = { 0x6b000 },
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