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Searched refs:GCC_PCIE_0_BCR (Results 1 – 25 of 25) sorted by relevance

/linux/include/dt-bindings/reset/
A Dqcom,gcc-apq8084.h90 #define GCC_PCIE_0_BCR 81 macro
/linux/include/dt-bindings/clock/
A Dqcom,gcc-sm6350.h165 #define GCC_PCIE_0_BCR 6 macro
A Dqcom,gcc-qcs404.h165 #define GCC_PCIE_0_BCR 9 macro
A Dqcom,gcc-sc7280.h209 #define GCC_PCIE_0_BCR 0 macro
A Dqcom,gcc-sdm845.h205 #define GCC_PCIE_0_BCR 1 macro
A Dqcom,gcc-sm8150.h217 #define GCC_PCIE_0_BCR 4 macro
A Dqcom,gcc-sm8250.h216 #define GCC_PCIE_0_BCR 4 macro
A Dqcom,gcc-sm8350.h219 #define GCC_PCIE_0_BCR 4 macro
A Dqcom,gcc-msm8998.h206 #define GCC_PCIE_0_BCR 12 macro
A Dqcom,gcc-sc8180x.h254 #define GCC_PCIE_0_BCR 4 macro
A Dqcom,gcc-msm8996.h319 #define GCC_PCIE_0_BCR 79 macro
/linux/Documentation/devicetree/bindings/pci/
A Dqcom,pcie.txt368 resets = <&gcc GCC_PCIE_0_BCR>;
/linux/arch/arm64/boot/dts/qcom/
A Dqcs404.dtsi1317 <&gcc GCC_PCIE_0_BCR>,
A Dsm8250.dtsi1421 resets = <&gcc GCC_PCIE_0_BCR>;
A Dsdm845.dtsi2037 resets = <&gcc GCC_PCIE_0_BCR>;
/linux/drivers/clk/qcom/
A Dgcc-qcs404.c2794 [GCC_PCIE_0_BCR] = { 0x3e000 },
A Dgcc-apq8084.c3562 [GCC_PCIE_0_BCR] = { 0x1ac0 },
A Dgcc-msm8996.c3578 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-msm8998.c3060 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sc7280.c3407 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sdm845.c3509 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sm8250.c3541 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sm8150.c3689 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sm8350.c3750 [GCC_PCIE_0_BCR] = { 0x6b000 },
A Dgcc-sc8180x.c4494 [GCC_PCIE_0_BCR] = { 0x6b000 },

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