Searched refs:GCC_PCIE_0_PHY_BCR (Results 1 – 25 of 25) sorted by relevance
| /linux/include/dt-bindings/reset/ |
| A D | qcom,gcc-apq8084.h | 91 #define GCC_PCIE_0_PHY_BCR 82 macro
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| /linux/include/dt-bindings/clock/ |
| A D | qcom,gcc-sm6350.h | 166 #define GCC_PCIE_0_PHY_BCR 7 macro
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| A D | qcom,gcc-qcs404.h | 166 #define GCC_PCIE_0_PHY_BCR 10 macro
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| A D | qcom,gcc-sc7280.h | 210 #define GCC_PCIE_0_PHY_BCR 1 macro
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| A D | qcom,gcc-sdm845.h | 228 #define GCC_PCIE_0_PHY_BCR 24 macro
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| A D | qcom,gcc-sm8150.h | 218 #define GCC_PCIE_0_PHY_BCR 5 macro
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| A D | qcom,gcc-sm8350.h | 222 #define GCC_PCIE_0_PHY_BCR 7 macro
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| A D | qcom,gcc-sm8250.h | 219 #define GCC_PCIE_0_PHY_BCR 7 macro
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| A D | qcom,gcc-msm8998.h | 270 #define GCC_PCIE_0_PHY_BCR 76 macro
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| A D | qcom,gcc-sc8180x.h | 255 #define GCC_PCIE_0_PHY_BCR 5 macro
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| A D | qcom,gcc-msm8996.h | 320 #define GCC_PCIE_0_PHY_BCR 80 macro
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| /linux/drivers/clk/qcom/ |
| A D | gcc-qcs404.c | 2795 [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
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| A D | gcc-apq8084.c | 3563 [GCC_PCIE_0_PHY_BCR] = { 0x1b00 },
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| A D | gcc-msm8996.c | 3579 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-msm8998.c | 3126 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sc7280.c | 3408 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sdm845.c | 3532 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sm8250.c | 3544 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sm8150.c | 3690 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sm8350.c | 3753 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| A D | gcc-sc8180x.c | 4495 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
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| /linux/arch/arm64/boot/dts/qcom/ |
| A D | msm8998.dtsi | 995 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
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| A D | msm8996.dtsi | 610 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
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| A D | sm8250.dtsi | 1450 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
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| A D | sdm845.dtsi | 2060 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
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