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Searched refs:GCC_PCIE_1_BCR (Results 1 – 19 of 19) sorted by relevance

/linux/include/dt-bindings/reset/
A Dqcom,gcc-apq8084.h92 #define GCC_PCIE_1_BCR 83 macro
/linux/include/dt-bindings/clock/
A Dqcom,gcc-sc7280.h211 #define GCC_PCIE_1_BCR 2 macro
A Dqcom,gcc-sdm845.h206 #define GCC_PCIE_1_BCR 2 macro
A Dqcom,gcc-sm8150.h219 #define GCC_PCIE_1_BCR 6 macro
A Dqcom,gcc-sm8250.h221 #define GCC_PCIE_1_BCR 9 macro
A Dqcom,gcc-sm8350.h224 #define GCC_PCIE_1_BCR 9 macro
A Dqcom,gcc-sc8180x.h256 #define GCC_PCIE_1_BCR 6 macro
A Dqcom,gcc-msm8996.h321 #define GCC_PCIE_1_BCR 81 macro
/linux/drivers/clk/qcom/
A Dgcc-apq8084.c3564 [GCC_PCIE_1_BCR] = { 0x1b40 },
A Dgcc-msm8996.c3580 [GCC_PCIE_1_BCR] = { 0x6d000 },
A Dgcc-sc7280.c3409 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sdm845.c3510 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8250.c3546 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8150.c3691 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8350.c3755 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sc8180x.c4496 [GCC_PCIE_1_BCR] = { 0x8d000 },
/linux/arch/arm64/boot/dts/qcom/
A Dsc7280.dtsi1627 resets = <&gcc GCC_PCIE_1_BCR>;
A Dsm8250.dtsi1525 resets = <&gcc GCC_PCIE_1_BCR>;
A Dsdm845.dtsi2147 resets = <&gcc GCC_PCIE_1_BCR>;

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