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Searched refs:GCC_SDCC1_BCR (Results 1 – 24 of 24) sorted by relevance

/linux/include/dt-bindings/reset/
A Dqcom,gcc-msm8974.h21 #define GCC_SDCC1_BCR 12 macro
A Dqcom,gcc-apq8084.h21 #define GCC_SDCC1_BCR 12 macro
A Dqcom,gcc-msm8916.h45 #define GCC_SDCC1_BCR 36 macro
A Dqcom,gcc-msm8939.h45 #define GCC_SDCC1_BCR 36 macro
A Dqcom,gcc-ipq6018.h54 #define GCC_SDCC1_BCR 45 macro
/linux/include/dt-bindings/clock/
A Dqcom,gcc-ipq4019.h138 #define GCC_SDCC1_BCR 42 macro
A Dqcom,gcc-sm6350.h161 #define GCC_SDCC1_BCR 2 macro
A Dqcom,gcc-qcm2290.h167 #define GCC_SDCC1_BCR 7 macro
A Dqcom,gcc-sm6115.h179 #define GCC_SDCC1_BCR 2 macro
A Dqcom,gcc-sc7280.h215 #define GCC_SDCC1_BCR 6 macro
A Dqcom,gcc-msm8996.h252 #define GCC_SDCC1_BCR 12 macro
A Dqcom,gcc-ipq8074.h286 #define GCC_SDCC1_BCR 49 macro
/linux/drivers/clk/qcom/
A Dgcc-ipq4019.c1681 [GCC_SDCC1_BCR] = {0x18000, 0},
A Dgcc-sm6350.c2495 [GCC_SDCC1_BCR] = { 0x4b000 },
A Dgcc-msm8974.c2738 [GCC_SDCC1_BCR] = { 0x04c0 },
A Dgcc-msm8916.c3299 [GCC_SDCC1_BCR] = { 0x42000 },
A Dgcc-apq8084.c3493 [GCC_SDCC1_BCR] = { 0x04c0 },
A Dgcc-msm8996.c3511 [GCC_SDCC1_BCR] = { 0x13000 },
A Dgcc-qcm2290.c2946 [GCC_SDCC1_BCR] = { 0x38000 },
A Dgcc-sc7280.c3413 [GCC_SDCC1_BCR] = { 0x75000 },
A Dgcc-sm6115.c3443 [GCC_SDCC1_BCR] = { 0x38000 },
A Dgcc-ipq8074.c4665 [GCC_SDCC1_BCR] = { 0x42000, 0 },
A Dgcc-msm8939.c3857 [GCC_SDCC1_BCR] = { 0x42000 },
A Dgcc-ipq6018.c4459 [GCC_SDCC1_BCR] = { 0x42000, 0 },

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