| /linux/include/dt-bindings/clock/ |
| A D | rk3036-cru.h | 86 #define HCLK_SDIO 457 macro
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| A D | rk3188-cru-common.h | 109 #define HCLK_SDIO 449 macro
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| A D | rk3128-cru.h | 129 #define HCLK_SDIO 457 macro
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| A D | rk3228-cru.h | 127 #define HCLK_SDIO 457 macro
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| A D | rv1108-cru.h | 144 #define HCLK_SDIO 325 macro
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| A D | rk3308-cru.h | 149 #define HCLK_SDIO 155 macro
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| A D | rk3328-cru.h | 180 #define HCLK_SDIO 318 macro
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| A D | px30-cru.h | 131 #define HCLK_SDIO 255 macro
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| A D | rk3399-cru.h | 334 #define HCLK_SDIO 494 macro
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| /linux/drivers/clk/rockchip/ |
| A D | clk-rk3036.c | 402 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 11, GFLAGS),
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| A D | clk-rk3128.c | 498 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 11, GFLAGS),
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| A D | clk-rk3228.c | 560 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 1, GFLAGS),
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| A D | clk-rk3188.c | 475 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 11, GFLAGS),
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| A D | clk-rk3328.c | 732 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK3328_CLKGATE_CON(19), 1, GFLAGS),
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| A D | clk-rv1108.c | 731 GATE(HCLK_SDIO, "hclk_sdio", "hclk_periph", 0, RV1108_CLKGATE_CON(15), 1, GFLAGS),
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| A D | clk-px30.c | 893 GATE(HCLK_SDIO, "hclk_sdio", "hclk_mmc_nand", 0, PX30_CLKGATE_CON(6), 9, GFLAGS),
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| A D | clk-rk3308.c | 822 GATE(HCLK_SDIO, "hclk_sdio", "hclk_peri", 0, RK3308_CLKGATE_CON(9), 8, GFLAGS),
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| A D | clk-rk3399.c | 1026 GATE(HCLK_SDIO, "hclk_sdio", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 4, GFLAGS),
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| /linux/arch/arm/boot/dts/ |
| A D | rk3xxx.dtsi | 220 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
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| A D | rk3036.dtsi | 266 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rv1108.dtsi | 491 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rk322x.dtsi | 761 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| /linux/arch/arm64/boot/dts/rockchip/ |
| A D | px30.dtsi | 275 <&cru HCLK_SDIO>,
962 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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| A D | rk3399.dtsi | 286 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
1098 clocks = <&cru HCLK_SDIO>;
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| A D | rk3308.dtsi | 687 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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