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Searched refs:HDMI_READ (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/gma500/
A Doaktrail_hdmi_i2c.c81 temp = HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_enable()
84 HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_enable()
90 HDMI_READ(HDMI_HICR); in hdmi_i2c_irq_disable()
107 HDMI_READ(HDMI_HI2CHCR); in xfer_read()
191 temp = HDMI_READ(HDMI_HISR); in hdmi_i2c_read()
193 HDMI_READ(HDMI_HISR); in hdmi_i2c_read()
198 HDMI_READ(HDMI_HI2CHCR); in hdmi_i2c_read()
210 temp = HDMI_READ(HDMI_HISR); in hdmi_i2c_transaction_done()
212 HDMI_READ(HDMI_HISR); in hdmi_i2c_transaction_done()
217 HDMI_READ(HDMI_HI2CHCR); in hdmi_i2c_transaction_done()
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A Doaktrail_hdmi.c36 #define HDMI_READ(reg) readl(hdmi_dev->regs + (reg)) macro
137 HDMI_READ(HDMI_HCR); in oaktrail_hdmi_audio_enable()
140 HDMI_READ(0x51a8); in oaktrail_hdmi_audio_enable()
143 HDMI_READ(HDMI_AUDIO_CTRL); in oaktrail_hdmi_audio_enable()
152 HDMI_READ(0x51a8); in oaktrail_hdmi_audio_disable()
155 HDMI_READ(HDMI_AUDIO_CTRL); in oaktrail_hdmi_audio_disable()
158 HDMI_READ(HDMI_HCR); in oaktrail_hdmi_audio_disable()
536 temp = HDMI_READ(HDMI_HSR); in oaktrail_hdmi_detect()
/linux/drivers/gpu/drm/vc4/
A Dvc4_hdmi_phy.c149 HDMI_READ(HDMI_TX_PHY_CTL_0) & in vc4_hdmi_phy_rng_enable()
156 HDMI_READ(HDMI_TX_PHY_CTL_0) | in vc4_hdmi_phy_rng_disable()
361 HDMI_READ(HDMI_TX_PHY_RESET_CTL) & in vc5_hdmi_phy_init()
368 HDMI_READ(HDMI_RM_CONTROL) | in vc5_hdmi_phy_init()
402 HDMI_READ(HDMI_TX_PHY_PLL_CTL_1) | in vc5_hdmi_phy_init()
409 HDMI_READ(HDMI_RM_FORMAT) | in vc5_hdmi_phy_init()
413 HDMI_READ(HDMI_TX_PHY_PLL_CFG) | in vc5_hdmi_phy_init()
463 HDMI_READ(HDMI_TX_PHY_CTL_1) | in vc5_hdmi_phy_init()
496 HDMI_READ(HDMI_TX_PHY_RESET_CTL) & in vc5_hdmi_phy_init()
501 HDMI_READ(HDMI_TX_PHY_RESET_CTL) | in vc5_hdmi_phy_init()
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A Dvc4_hdmi.c149 value = HDMI_READ(HDMI_CEC_CNTRL_1); in vc4_hdmi_cec_update_clk_div()
834 reg = HDMI_READ(HDMI_GCP_WORD_1); in vc5_hdmi_set_timings()
839 reg = HDMI_READ(HDMI_GCP_CONFIG); in vc5_hdmi_set_timings()
852 drift = HDMI_READ(HDMI_FIFO_CTL); in vc4_hdmi_recenter_fifo()
977 HDMI_READ(HDMI_SCHEDULER_CONTROL) | in vc4_hdmi_encoder_pre_crtc_configure()
1682 cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1); in vc4_cec_irq_handler_tx_bare()
1696 cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1); in vc4_cec_irq_handler_rx_bare()
1717 cntrl5 = HDMI_READ(HDMI_CEC_CNTRL_5); in vc4_cec_irq_handler()
1733 u32 val = HDMI_READ(HDMI_CEC_CNTRL_5); in vc4_hdmi_cec_adap_enable()
1803 val = HDMI_READ(HDMI_CEC_CNTRL_1); in vc4_hdmi_cec_adap_transmit()
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A Dvc4_hdmi_regs.h431 #define HDMI_READ(reg) vc4_hdmi_read(vc4_hdmi, reg) macro

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