Searched refs:HHI_HDMI_PLL_CNTL2 (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/meson/ |
| A D | meson_vclk.c | 101 #define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in data sheet */ macro
247 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00404e00); in meson_venci_cvbs_clock_config()
260 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb300); in meson_venci_cvbs_clock_config()
277 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x00010000); in meson_venci_cvbs_clock_config()
499 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
502 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
519 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000 | frac); in meson_hdmi_pll_set_params()
542 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, frac); in meson_hdmi_pll_set_params()
587 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
598 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL2, in meson_hdmi_pll_set_params()
[all …]
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| /linux/drivers/clk/meson/ |
| A D | gxbb.h | 98 #define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in data sheet */ macro
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| A D | g12a.h | 115 #define HHI_HDMI_PLL_CNTL2 0x328 macro
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| A D | gxbb.c | 181 .reg_off = HHI_HDMI_PLL_CNTL2,
235 .reg_off = HHI_HDMI_PLL_CNTL2,
267 .offset = HHI_HDMI_PLL_CNTL2,
285 .offset = HHI_HDMI_PLL_CNTL2,
303 .offset = HHI_HDMI_PLL_CNTL2,
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