Searched refs:HHI_HDMI_PLL_CNTL3 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/meson/ |
| A D | meson_vclk.c | 102 #define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in data sheet */ macro
248 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_venci_cvbs_clock_config()
261 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0xa6212844); in meson_venci_cvbs_clock_config()
278 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x00000000); in meson_venci_cvbs_clock_config()
504 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x0d5c5091); in meson_hdmi_pll_set_params()
520 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x860f30c4); in meson_hdmi_pll_set_params()
543 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL3, 0x00000000); in meson_hdmi_pll_set_params()
591 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
602 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
613 regmap_update_bits(priv->hhi, HHI_HDMI_PLL_CNTL3, in meson_hdmi_pll_set_params()
|
| /linux/drivers/clk/meson/ |
| A D | gxbb.h | 99 #define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in data sheet */ macro
|
| A D | g12a.h | 116 #define HHI_HDMI_PLL_CNTL3 0x32c macro
|
Completed in 6 milliseconds