Searched refs:HHI_HDMI_PLL_CNTL5 (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/meson/ |
| A D | meson_vclk.c | 104 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro
250 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config()
263 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_venci_cvbs_clock_config()
280 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x65771290); in meson_venci_cvbs_clock_config()
506 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_hdmi_pll_set_params()
522 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_hdmi_pll_set_params()
550 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, in meson_hdmi_pll_set_params()
555 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, in meson_hdmi_pll_set_params()
562 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x33771290); in meson_hdmi_pll_set_params()
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| /linux/drivers/clk/meson/ |
| A D | gxbb.h | 101 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro
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| A D | g12a.h | 118 #define HHI_HDMI_PLL_CNTL5 0x334 macro
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