Home
last modified time | relevance | path

Searched refs:IMX7D_PLL_ENET_MAIN_100M_CLK (Results 1 – 10 of 10) sorted by relevance

/linux/arch/arm/boot/dts/
A Dimx7d.dtsi191 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
197 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-cl-som-imx7.dts49 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
77 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-zii-rmu2.dts59 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-sdb.dts224 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
251 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-zii-rpu2.dts213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-pico.dtsi123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7d-nitrogen7.dts133 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
A Dimx7-colibri.dtsi77 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
/linux/include/dt-bindings/clock/
A Dimx7d-clock.h52 #define IMX7D_PLL_ENET_MAIN_100M_CLK 43 macro
/linux/drivers/clk/imx/
A Dclk-imx7d.c480 …hws[IMX7D_PLL_ENET_MAIN_100M_CLK] = imx_clk_hw_gate("pll_enet_100m_clk", "pll_enet_100m", base + 0… in imx7d_clocks_init()

Completed in 14 milliseconds