Searched refs:IMX7D_PLL_ENET_MAIN_250M_CLK (Results 1 – 3 of 3) sorted by relevance
50 #define IMX7D_PLL_ENET_MAIN_250M_CLK 41 macro
196 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
478 …hws[IMX7D_PLL_ENET_MAIN_250M_CLK] = imx_clk_hw_gate("pll_enet_250m_clk", "pll_enet_250m", base + 0… in imx7d_clocks_init()
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